powerpc/xics: Add ICP OPAL backend

This adds a new XICS backend that uses OPAL calls, which can be
used when we don't have native support for the platform interrupt
controller.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

diff --git a/arch/powerpc/include/asm/xics.h b/arch/powerpc/include/asm/xics.h
index 04ef3ae511da85104ba01570deb9050c5f2f4dd0..f5f729c115781a8d6c9c1850f89558b06383c761 100644 (file)
--- a/arch/powerpc/include/asm/xics.h
+++ b/arch/powerpc/include/asm/xics.h
@@ -42,6 +42,12 @@ extern int icp_hv_init(void);
 static inline int icp_hv_init(void) { return -ENODEV; }
 #endif
 
+#ifdef CONFIG_PPC_POWERNV
+extern int icp_opal_init(void);
+#else
+static inline int icp_opal_init(void) { return -ENODEV; }
+#endif
+
 /* ICP ops */
 struct icp_ops {
        unsigned int (*get_irq)(void);

diff --git a/arch/powerpc/sysdev/xics/Makefile b/arch/powerpc/sysdev/xics/Makefile
index c606aa8ba60aced2240fd3fb9522e802ffc34b85..5d7f5a6564de02a6335906d6f568722b1b1e930b 100644 (file)
--- a/arch/powerpc/sysdev/xics/Makefile
+++ b/arch/powerpc/sysdev/xics/Makefile
@@ -4,4 +4,4 @@ obj-y                           += xics-common.o
 obj-$(CONFIG_PPC_ICP_NATIVE)   += icp-native.o
 obj-$(CONFIG_PPC_ICP_HV)       += icp-hv.o
 obj-$(CONFIG_PPC_ICS_RTAS)     += ics-rtas.o
-obj-$(CONFIG_PPC_POWERNV)      += ics-opal.o
+obj-$(CONFIG_PPC_POWERNV)      += ics-opal.o icp-opal.o

diff --git a/arch/powerpc/sysdev/xics/icp-opal.c b/arch/powerpc/sysdev/xics/icp-opal.c
new file mode 100644 (file)
index 0000000..57d72f1
--- /dev/null
+++ b/arch/powerpc/sysdev/xics/icp-opal.c
@@ -0,0 +1,144 @@
+/*
+ * Copyright 2016 IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <linux/irq.h>
+#include <linux/smp.h>
+#include <linux/interrupt.h>
+#include <linux/cpu.h>
+#include <linux/of.h>
+
+#include <asm/smp.h>
+#include <asm/irq.h>
+#include <asm/errno.h>
+#include <asm/xics.h>
+#include <asm/io.h>
+#include <asm/opal.h>
+
+static void icp_opal_teardown_cpu(void)
+{
+       int cpu = smp_processor_id();
+
+       /* Clear any pending IPI */
+       opal_int_set_mfrr(cpu, 0xff);
+}
+
+static void icp_opal_flush_ipi(void)
+{
+       /*
+        * We take the ipi irq but and never return so we need to EOI the IPI,
+        * but want to leave our priority 0.
+        *
+        * Should we check all the other interrupts too?
+        * Should we be flagging idle loop instead?
+        * Or creating some task to be scheduled?
+        */
+       opal_int_eoi((0x00 << 24) | XICS_IPI);
+}
+
+static unsigned int icp_opal_get_irq(void)
+{
+       unsigned int xirr;
+       unsigned int vec;
+       unsigned int irq;
+       int64_t rc;
+
+       rc = opal_int_get_xirr(&xirr, false);
+       if (rc < 0)
+               return NO_IRQ;
+       xirr = be32_to_cpu(xirr);
+       vec = xirr & 0x00ffffff;
+       if (vec == XICS_IRQ_SPURIOUS)
+               return NO_IRQ;
+
+       irq = irq_find_mapping(xics_host, vec);
+       if (likely(irq != NO_IRQ)) {
+               xics_push_cppr(vec);
+               return irq;
+       }
+
+       /* We don't have a linux mapping, so have rtas mask it. */
+       xics_mask_unknown_vec(vec);
+
+       /* We might learn about it later, so EOI it */
+       opal_int_eoi(xirr);
+
+       return NO_IRQ;
+}
+
+static void icp_opal_set_cpu_priority(unsigned char cppr)
+{
+       xics_set_base_cppr(cppr);
+       opal_int_set_cppr(cppr);
+       iosync();
+}
+
+static void icp_opal_eoi(struct irq_data *d)
+{
+       unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d);
+       int64_t rc;
+
+       iosync();
+       rc = opal_int_eoi((xics_pop_cppr() << 24) | hw_irq);
+
+       /*
+        * EOI tells us whether there are more interrupts to fetch.
+        *
+        * Some HW implementations might not be able to send us another
+        * external interrupt in that case, so we force a replay.
+        */
+       if (rc > 0)
+               force_external_irq_replay();
+}
+
+#ifdef CONFIG_SMP
+
+static void icp_opal_cause_ipi(int cpu, unsigned long data)
+{
+       opal_int_set_mfrr(cpu, IPI_PRIORITY);
+}
+
+static irqreturn_t icp_opal_ipi_action(int irq, void *dev_id)
+{
+       int cpu = smp_processor_id();
+
+       opal_int_set_mfrr(cpu, 0xff);
+
+       return smp_ipi_demux();
+}
+
+#endif /* CONFIG_SMP */
+
+static const struct icp_ops icp_opal_ops = {
+       .get_irq        = icp_opal_get_irq,
+       .eoi            = icp_opal_eoi,
+       .set_priority   = icp_opal_set_cpu_priority,
+       .teardown_cpu   = icp_opal_teardown_cpu,
+       .flush_ipi      = icp_opal_flush_ipi,
+#ifdef CONFIG_SMP
+       .ipi_action     = icp_opal_ipi_action,
+       .cause_ipi      = icp_opal_cause_ipi,
+#endif
+};
+
+int icp_opal_init(void)
+{
+       struct device_node *np;
+
+       np = of_find_compatible_node(NULL, NULL, "ibm,opal-intc");
+       if (!np)
+               return -ENODEV;
+
+       icp_ops = &icp_opal_ops;
+
+       printk("XICS: Using OPAL ICP fallbacks\n");
+
+       return 0;
+}
+

diff --git a/arch/powerpc/sysdev/xics/xics-common.c b/arch/powerpc/sysdev/xics/xics-common.c
index 47e43b7b076bb2e4aa0cd3790e132185b422f9ae..a795a5f0301c482ec8edeb3047464ea709f7326b 100644 (file)
--- a/arch/powerpc/sysdev/xics/xics-common.c
+++ b/arch/powerpc/sysdev/xics/xics-common.c
@@ -404,8 +404,11 @@ void __init xics_init(void)
        /* Fist locate ICP */
        if (firmware_has_feature(FW_FEATURE_LPAR))
                rc = icp_hv_init();
-       if (rc < 0)
+       if (rc < 0) {
                rc = icp_native_init();
+               if (rc == -ENODEV)
+                   rc = icp_opal_init();
+       }
        if (rc < 0) {
                pr_warning("XICS: Cannot find a Presentation Controller !\n");
                return;