drm/i915: Clear display interrupt before enabling when turning on the power well
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Mon, 11 Apr 2016 13:56:27 +0000 (16:56 +0300)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Tue, 12 Apr 2016 16:07:38 +0000 (19:07 +0300)
For a bit of extra paranoia make sure the display irqs are all cleared
before we enabled them when turning on the power well. This should
really be the case already since the power well was off which resets
everything.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1460382992-28728-6-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Imre Deak <imre.deak@intel.com>
drivers/gpu/drm/i915/i915_irq.c

index 6885c0d12167d866f62a2ae91afb3e022abe82d4..5fc0f2e3b083918cc520602398cb59383a58b54b 100644 (file)
@@ -3309,13 +3309,6 @@ static void vlv_display_irq_postinstall(struct drm_i915_private *dev_priv)
        u32 iir_mask;
        enum pipe pipe;
 
-       pipestat_mask = PIPESTAT_INT_STATUS_MASK |
-                       PIPE_FIFO_UNDERRUN_STATUS;
-
-       for_each_pipe(dev_priv, pipe)
-               I915_WRITE(PIPESTAT(pipe), pipestat_mask);
-       POSTING_READ(PIPESTAT(PIPE_A));
-
        pipestat_mask = PLANE_FLIP_DONE_INT_STATUS_VLV |
                        PIPE_CRC_DONE_INTERRUPT_STATUS;
 
@@ -3699,8 +3692,10 @@ void valleyview_enable_display_irqs(struct drm_i915_private *dev_priv)
 
        dev_priv->display_irqs_enabled = true;
 
-       if (intel_irqs_enabled(dev_priv))
+       if (intel_irqs_enabled(dev_priv)) {
+               vlv_display_irq_reset(dev_priv);
                vlv_display_irq_postinstall(dev_priv);
+       }
 }
 
 void valleyview_disable_display_irqs(struct drm_i915_private *dev_priv)