config MACH_SMDK6440
bool "SMDK6440"
select CPU_S5P6440
-- select SAMSUNG_DEV_TS
-- select SAMSUNG_DEV_ADC
- select S3C_DEV_RTC
+ select S3C_DEV_I2C1
++ select S3C_DEV_RTC
select S3C_DEV_WDT
- select HAVE_S3C_RTC
- select HAVE_S3C2410_WATCHDOG
++ select SAMSUNG_DEV_ADC
++ select SAMSUNG_DEV_TS
+ select S5P6440_SETUP_I2C1
help
Machine support for the Samsung SMDK6440
config MACH_SMDKC100
bool "SMDKC100"
select CPU_S5PC100
- select SAMSUNG_DEV_ADC
select S3C_DEV_FB
-- select S3C_DEV_I2C1
- select SAMSUNG_DEV_IDE
select S3C_DEV_HSMMC
select S3C_DEV_HSMMC1
select S3C_DEV_HSMMC2
- select SAMSUNG_DEV_KEYPAD
++ select S3C_DEV_I2C1
+ select S3C_DEV_RTC
- select SAMSUNG_DEV_TS
select S3C_DEV_WDT
- select HAVE_S3C2410_WATCHDOG
++ select SAMSUNG_DEV_ADC
++ select SAMSUNG_DEV_IDE
++ select SAMSUNG_DEV_KEYPAD
++ select SAMSUNG_DEV_TS
select S5PC100_SETUP_FB_24BPP
select S5PC100_SETUP_I2C1
+ select S5PC100_SETUP_IDE
+ select S5PC100_SETUP_KEYPAD
select S5PC100_SETUP_SDHCI
- select HAVE_S3C_RTC
help
Machine support for the Samsung SMDKC100
#define S3C_PA_ONENAND S5PC100_PA_ONENAND
#define S3C_PA_ONENAND_BUF S5PC100_PA_ONENAND_BUF
#define S3C_SZ_ONENAND_BUF S5PC100_SZ_ONENAND_BUF
+#define S3C_PA_RTC S5PC100_PA_RTC
+
+#define SAMSUNG_PA_ADC S5PC100_PA_TSADC
+#define SAMSUNG_PA_CFCON S5PC100_PA_CFCON
+#define SAMSUNG_PA_KEYPAD S5PC100_PA_KEYPAD
+ #define S5P_PA_FIMC0 S5PC100_PA_FIMC0
+ #define S5P_PA_FIMC1 S5PC100_PA_FIMC1
+ #define S5P_PA_FIMC2 S5PC100_PA_FIMC2
+
#endif /* __ASM_ARCH_C100_MAP_H */
help
Common setup code for SDHCI gpio.
-# machine support
++config S5PC110_DEV_ONENAND
++ bool
++ help
++ Compile in platform device definition for OneNAND1 controller
++
+menu "S5PC110 Machines"
config MACH_AQUILA
- bool "Samsung Aquila"
+ bool "Aquila"
select CPU_S5PV210
select ARCH_SPARSEMEM_ENABLE
-- select S5PV210_SETUP_FB_24BPP
- select S5PV210_SETUP_SDHCI
select S3C_DEV_FB
- select S5PC110_DEV_ONENAND
+ select S3C_DEV_HSMMC
+ select S3C_DEV_HSMMC1
+ select S3C_DEV_HSMMC2
++ select S5PC110_DEV_ONENAND
++ select S5PV210_SETUP_FB_24BPP
++ select S5PV210_SETUP_SDHCI
help
Machine support for the Samsung Aquila target based on S5PC110 SoC
bool "GONI"
select CPU_S5PV210
select ARCH_SPARSEMEM_ENABLE
- select S5PV210_SETUP_FB_24BPP
- select S5PV210_SETUP_SDHCI
+ select S3C_DEV_FB
- select S5PC110_DEV_ONENAND
+ select S3C_DEV_HSMMC
+ select S3C_DEV_HSMMC1
+ select S3C_DEV_HSMMC2
++ select S5PC110_DEV_ONENAND
++ select S5PV210_SETUP_FB_24BPP
++ select S5PV210_SETUP_SDHCI
help
Machine support for Samsung GONI board
S5PC110(MCP) is one of package option of S5PV210
-config S5PC110_DEV_ONENAND
- bool
+config MACH_SMDKC110
+ bool "SMDKC110"
+ select CPU_S5PV210
+ select ARCH_SPARSEMEM_ENABLE
+ select S3C_DEV_I2C1
+ select S3C_DEV_I2C2
- select SAMSUNG_DEV_IDE
+ select S3C_DEV_RTC
+ select S3C_DEV_WDT
- select HAVE_S3C_RTC
- select HAVE_S3C2410_WATCHDOG
++ select SAMSUNG_DEV_IDE
+ select S5PV210_SETUP_I2C1
+ select S5PV210_SETUP_I2C2
+ select S5PV210_SETUP_IDE
help
- Compile in platform device definition for OneNAND1 controller
+ Machine support for Samsung SMDKC110
+ S5PC110(MCP) is one of package option of S5PV210
+
+endmenu
+
- config S5PC110_DEV_ONENAND
- bool
- help
- Compile in platform device definition for OneNAND1 controller
-
+menu "S5PV210 Machines"
config MACH_SMDKV210
bool "SMDKV210"
select CPU_S5PV210
select ARCH_SPARSEMEM_ENABLE
- select SAMSUNG_DEV_ADC
+ select S3C_DEV_HSMMC
+ select S3C_DEV_HSMMC1
+ select S3C_DEV_HSMMC2
+ select S3C_DEV_HSMMC3
+ select S3C_DEV_I2C1
+ select S3C_DEV_I2C2
++ select S3C_DEV_RTC
++ select S3C_DEV_WDT
+ select SAMSUNG_DEV_ADC
+ select SAMSUNG_DEV_IDE
+ select SAMSUNG_DEV_KEYPAD
select SAMSUNG_DEV_TS
- select S3C_DEV_RTC
-- select S3C_DEV_WDT
- select HAVE_S3C_RTC
- select HAVE_S3C2410_WATCHDOG
+ select S5PV210_SETUP_I2C1
+ select S5PV210_SETUP_I2C2
+ select S5PV210_SETUP_IDE
+ select S5PV210_SETUP_KEYPAD
+ select S5PV210_SETUP_SDHCI
help
Machine support for Samsung SMDKV210
#include <plat/devs.h>
#include <plat/clock.h>
#include <plat/s5pv210.h>
+ #include <plat/adc-core.h>
+#include <plat/ata-core.h>
+ #include <plat/fimc-core.h>
#include <plat/iic-core.h>
+#include <plat/keypad-core.h>
#include <plat/sdhci.h>
+#include <plat/reset.h>
/* Initial IO mappings */
s5pv210_default_sdhci0();
s5pv210_default_sdhci1();
s5pv210_default_sdhci2();
+ s5pv210_default_sdhci3();
+ s3c_adc_setname("s3c64xx-adc");
+
+ s3c_cfcon_setname("s5pv210-pata");
+
++ s3c_fimc_setname(0, "s5pv210-fimc");
++ s3c_fimc_setname(1, "s5pv210-fimc");
++ s3c_fimc_setname(2, "s5pv210-fimc");
++
/* the i2c devices are directly compatible with s3c2440 */
s3c_i2c0_setname("s3c2440-i2c");
s3c_i2c1_setname("s3c2440-i2c");
#define S3C_PA_IIC1 S5PV210_PA_IIC1
#define S3C_PA_IIC2 S5PV210_PA_IIC2
#define S3C_PA_FB S5PV210_PA_FB
+#define S3C_PA_RTC S5PV210_PA_RTC
#define S3C_PA_WDT S5PV210_PA_WATCHDOG
+ #define S5P_PA_FIMC0 S5PV210_PA_FIMC0
+ #define S5P_PA_FIMC1 S5PV210_PA_FIMC1
+ #define S5P_PA_FIMC2 S5PV210_PA_FIMC2
#define SAMSUNG_PA_ADC S5PV210_PA_ADC
+#define SAMSUNG_PA_CFCON S5PV210_PA_CFCON
+#define SAMSUNG_PA_KEYPAD S5PV210_PA_KEYPAD
#endif /* __ASM_ARCH_MAP_H */
break;
}
- s3c_gpio_setpull(S5PV210_GPG2(2), S3C_GPIO_PULL_UP);
- s3c_gpio_cfgpin(S5PV210_GPG2(2), S3C_GPIO_SFN(2));
+ if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
+ s3c_gpio_setpull(S5PV210_GPG2(2), S3C_GPIO_PULL_UP);
+ s3c_gpio_cfgpin(S5PV210_GPG2(2), S3C_GPIO_SFN(2));
+ }
}
+
+void s5pv210_setup_sdhci3_cfg_gpio(struct platform_device *dev, int width)
+{
+ unsigned int gpio;
+
+ /* Set all the necessary GPG3[0:2] pins to special-function 2 */
+ for (gpio = S5PV210_GPG3(0); gpio < S5PV210_GPG3(2); gpio++) {
+ s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
+ s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+ }
+
+ /* Data pin GPG3[3:6] to special-function 2 */
+ for (gpio = S5PV210_GPG3(3); gpio <= S5PV210_GPG3(6); gpio++) {
+ s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
+ s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
+ }
+
+ s3c_gpio_setpull(S5PV210_GPG3(2), S3C_GPIO_PULL_UP);
+ s3c_gpio_cfgpin(S5PV210_GPG3(2), S3C_GPIO_SFN(2));
+}
extern void s5pv210_setup_sdhci0_cfg_gpio(struct platform_device *, int w);
extern void s5pv210_setup_sdhci1_cfg_gpio(struct platform_device *, int w);
extern void s5pv210_setup_sdhci2_cfg_gpio(struct platform_device *, int w);
+extern void s5pv210_setup_sdhci3_cfg_gpio(struct platform_device *, int w);
- /* S3C6400 SDHCI setup */
+ /* S3C64XX SDHCI setup */
#ifdef CONFIG_S3C64XX_SETUP_SDHCI
extern char *s3c64xx_hsmmc_clksrcs[4];
s3c_hsmmc2_def_platdata.clocks = s5pv210_hsmmc_clksrcs;
s3c_hsmmc2_def_platdata.cfg_gpio = s5pv210_setup_sdhci2_cfg_gpio;
s3c_hsmmc2_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card;
+ #endif
}
- #else
- static inline void s5pv210_default_sdhci2(void) { }
- #endif /* CONFIG_S3C_DEV_HSMMC2 */
- #ifdef CONFIG_S3C_DEV_HSMMC3
+static inline void s5pv210_default_sdhci3(void)
+{
++#ifdef CONFIG_S3C_DEV_HSMMC3
+ s3c_hsmmc3_def_platdata.clocks = s5pv210_hsmmc_clksrcs;
+ s3c_hsmmc3_def_platdata.cfg_gpio = s5pv210_setup_sdhci3_cfg_gpio;
+ s3c_hsmmc3_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card;
++#endif
+}
- #else
- static inline void s5pv210_default_sdhci3(void) { }
- #endif /* CONFIG_S3C_DEV_HSMMC3 */
+
#else
static inline void s5pv210_default_sdhci0(void) { }
static inline void s5pv210_default_sdhci1(void) { }
static inline void s5pv210_default_sdhci2(void) { }
- #endif /* CONFIG_S5PC100_SETUP_SDHCI */
-
-
+static inline void s5pv210_default_sdhci3(void) { }
+ #endif /* CONFIG_S5PV210_SETUP_SDHCI */
#endif /* __PLAT_S3C_SDHCI_H */