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drm/i915/gvt: Change the max length of mmio_reg_rw from 4 to 8
authorXiong Zhang <xiong.y.zhang@intel.com>
Wed, 2 Aug 2017 02:31:01 +0000 (10:31 +0800)
committerZhenyu Wang <zhenyuw@linux.intel.com>
Mon, 7 Aug 2017 07:50:39 +0000 (15:50 +0800)
When linux guest access mmio with __raw_i915_read64 or __raw_i915_write64,
its length is 8 bytes.

This fix the linux guest in xengt couldn't boot up as it fail in
reading pv_info->magic.

Fixes: 65f9f6febf12 ("drm/i915/gvt: Optimize MMIO register handling for some large MMIO blocks")
Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
drivers/gpu/drm/i915/gvt/handlers.c patch | blob | blame | history

diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c
index 323664a238f5ab17f13e42c5b29f7f16f102aed5..feed9921b3b3eb05e6e8dce5e1b510f4d6fc9479 100644 (file)
--- a/drivers/gpu/drm/i915/gvt/handlers.c
+++ b/drivers/gpu/drm/i915/gvt/handlers.c
@@ -3028,7 +3028,7 @@ int intel_vgpu_mmio_reg_rw(struct intel_vgpu *vgpu, unsigned int offset,
        gvt_mmio_func func;
        int ret;
 
-       if (WARN_ON(bytes > 4))
+       if (WARN_ON(bytes > 8))
                return -EINVAL;
 
        /*