ARM: davinci: Remove redundant/unused parameters for edma
authorPeter Ujfalusi <peter.ujfalusi@ti.com>
Fri, 16 May 2014 12:17:19 +0000 (15:17 +0300)
committerSekhar Nori <nsekhar@ti.com>
Thu, 22 May 2014 09:25:23 +0000 (14:55 +0530)
The following parameters are no longer needed by the edma driver since the
information can be obtained from the IP's CCCFG register:
n_channel, n_region, n_slot and n_tc.
Remove the initialization of n_cc as well since in this context it has no
meaning. We have separate edma_soc_info struct/eDMA3_CC instance so this
member does not make any sense (and the driver no longer uses it).

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
arch/arm/mach-davinci/devices-da8xx.c
arch/arm/mach-davinci/dm355.c
arch/arm/mach-davinci/dm365.c
arch/arm/mach-davinci/dm644x.c
arch/arm/mach-davinci/dm646x.c

index 7f376e54b2662acd6dc8ed2ebb6fb5ab2ab4edab..b85b781b05fdf7d89d7a3c256727ea9024b6d0d8 100644 (file)
@@ -148,11 +148,6 @@ static s8 da850_queue_priority_mapping[][2] = {
 };
 
 static struct edma_soc_info da830_edma_cc0_info = {
-       .n_channel              = 32,
-       .n_region               = 4,
-       .n_slot                 = 128,
-       .n_tc                   = 2,
-       .n_cc                   = 1,
        .queue_priority_mapping = da8xx_queue_priority_mapping,
        .default_queue          = EVENTQ_1,
 };
@@ -163,20 +158,10 @@ static struct edma_soc_info *da830_edma_info[EDMA_MAX_CC] = {
 
 static struct edma_soc_info da850_edma_cc_info[] = {
        {
-               .n_channel              = 32,
-               .n_region               = 4,
-               .n_slot                 = 128,
-               .n_tc                   = 2,
-               .n_cc                   = 1,
                .queue_priority_mapping = da8xx_queue_priority_mapping,
                .default_queue          = EVENTQ_1,
        },
        {
-               .n_channel              = 32,
-               .n_region               = 4,
-               .n_slot                 = 128,
-               .n_tc                   = 1,
-               .n_cc                   = 1,
                .queue_priority_mapping = da850_queue_priority_mapping,
                .default_queue          = EVENTQ_0,
        },
index e27f7ff545704cd4dbdf8c83e17cc702480ab15d..2f3ed3a58d57a1c90005662d91f43af13dfe3b36 100644 (file)
@@ -577,11 +577,6 @@ queue_priority_mapping[][2] = {
 };
 
 static struct edma_soc_info edma_cc0_info = {
-       .n_channel              = 64,
-       .n_region               = 4,
-       .n_slot                 = 128,
-       .n_tc                   = 2,
-       .n_cc                   = 1,
        .queue_priority_mapping = queue_priority_mapping,
        .default_queue          = EVENTQ_1,
 };
index 88835b0aaead7e34914df898be6ddf9e38f58115..0ae8114f5cc9176dfb2e78ff543d54a4b1401f6b 100644 (file)
@@ -863,11 +863,6 @@ dm365_queue_priority_mapping[][2] = {
 };
 
 static struct edma_soc_info edma_cc0_info = {
-       .n_channel              = 64,
-       .n_region               = 4,
-       .n_slot                 = 256,
-       .n_tc                   = 4,
-       .n_cc                   = 1,
        .queue_priority_mapping = dm365_queue_priority_mapping,
        .default_queue          = EVENTQ_3,
 };
index 8ea34be879b4bbbab1296f0ddd7281ec588404bd..dc52657909c4766eabd07d33a83e3c0fe8b68140 100644 (file)
@@ -507,11 +507,6 @@ queue_priority_mapping[][2] = {
 };
 
 static struct edma_soc_info edma_cc0_info = {
-       .n_channel              = 64,
-       .n_region               = 4,
-       .n_slot                 = 128,
-       .n_tc                   = 2,
-       .n_cc                   = 1,
        .queue_priority_mapping = queue_priority_mapping,
        .default_queue          = EVENTQ_1,
 };
index 97e90dc5ed43da2817e0a1554c378d4f321b354e..6c3bbea7d77d8f8f2432ec9321936cedf2e942f5 100644 (file)
@@ -543,11 +543,6 @@ dm646x_queue_priority_mapping[][2] = {
 };
 
 static struct edma_soc_info edma_cc0_info = {
-       .n_channel              = 64,
-       .n_region               = 6,    /* 0-1, 4-7 */
-       .n_slot                 = 512,
-       .n_tc                   = 4,
-       .n_cc                   = 1,
        .queue_priority_mapping = dm646x_queue_priority_mapping,
        .default_queue          = EVENTQ_1,
 };