mtd: nand: atmel: set ECC algorithm explicitly
authorRafał Miłecki <zajec5@gmail.com>
Sun, 17 Apr 2016 20:52:59 +0000 (22:52 +0200)
committerBoris Brezillon <boris.brezillon@free-electrons.com>
Thu, 5 May 2016 21:52:03 +0000 (23:52 +0200)
This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to
enum nand_ecc_algo).

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
drivers/mtd/nand/atmel_nand.c

index eec8ca739cae8f686ae0b4a84be3e9e7da1b3b49..efc8ea250c1d5966409d9aabb6588af55e4d478a 100644 (file)
@@ -1212,6 +1212,7 @@ static int atmel_pmecc_nand_init_params(struct platform_device *pdev,
                dev_warn(host->dev,
                        "Can't get I/O resource regs for PMECC controller, rolling back on software ECC\n");
                nand_chip->ecc.mode = NAND_ECC_SOFT;
+               nand_chip->ecc.algo = NAND_ECC_HAMMING;
                return 0;
        }
 
@@ -1295,6 +1296,7 @@ static int atmel_pmecc_nand_init_params(struct platform_device *pdev,
                /* page size not handled by HW ECC */
                /* switching back to soft ECC */
                nand_chip->ecc.mode = NAND_ECC_SOFT;
+               nand_chip->ecc.algo = NAND_ECC_HAMMING;
                return 0;
        }
 
@@ -1613,6 +1615,7 @@ static int atmel_of_init_port(struct atmel_nand_host *host,
         * even if the nand-ecc-mode property is not defined.
         */
        host->nand_chip.ecc.mode = NAND_ECC_SOFT;
+       host->nand_chip.ecc.algo = NAND_ECC_HAMMING;
 
        return 0;
 }
@@ -1629,6 +1632,7 @@ static int atmel_hw_nand_init_params(struct platform_device *pdev,
                dev_err(host->dev,
                        "Can't get I/O resource regs, use software ECC\n");
                nand_chip->ecc.mode = NAND_ECC_SOFT;
+               nand_chip->ecc.algo = NAND_ECC_HAMMING;
                return 0;
        }
 
@@ -1661,6 +1665,7 @@ static int atmel_hw_nand_init_params(struct platform_device *pdev,
                /* page size not handled by HW ECC */
                /* switching back to soft ECC */
                nand_chip->ecc.mode = NAND_ECC_SOFT;
+               nand_chip->ecc.algo = NAND_ECC_HAMMING;
                return 0;
        }
 
@@ -2160,6 +2165,14 @@ static int atmel_nand_probe(struct platform_device *pdev)
                       sizeof(struct atmel_nand_data));
                nand_chip->ecc.mode = host->board.ecc_mode;
 
+               /*
+                * When using software ECC every supported avr32 board means
+                * Hamming algorithm. If that ever changes we'll need to add
+                * ecc_algo field to the struct atmel_nand_data.
+                */
+               if (nand_chip->ecc.mode == NAND_ECC_SOFT)
+                       nand_chip->ecc.algo = NAND_ECC_HAMMING;
+
                /* 16-bit bus width */
                if (host->board.bus_width_16)
                        nand_chip->options |= NAND_BUSWIDTH_16;