drm/i915: don't run hsw power well code on !hsw
authorDaniel Vetter <daniel.vetter@ffwll.ch>
Wed, 30 Jan 2013 14:59:56 +0000 (15:59 +0100)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Thu, 31 Jan 2013 10:50:10 +0000 (11:50 +0100)
Dumps annoying noise into the dmesg:

[drm:intel_set_power_well] *ERROR* Timeout enabling power well

Reported-by: Sedat Dilek <sedat.dilek@gmail.com>
Cc: Sedat Dilek <sedat.dilek@gmail.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Tested-by: Sedat Dilek <sedat.dilek@gmail.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_pm.c

index bec1f9ffba2dc18dd4114329a6dc64bf2e4e28cf..f024e7dcc2c7813208ef1e00cbe1b10880aa4dec 100644 (file)
@@ -4053,6 +4053,9 @@ void intel_set_power_well(struct drm_device *dev, bool enable)
        bool is_enabled, enable_requested;
        uint32_t tmp;
 
+       if (!IS_HASWELL(dev))
+               return;
+
        tmp = I915_READ(HSW_PWR_WELL_DRIVER);
        is_enabled = tmp & HSW_PWR_WELL_STATE;
        enable_requested = tmp & HSW_PWR_WELL_ENABLE;