wl18xx: translate and write the board type to SCR_PAD2
authorLuciano Coelho <coelho@ti.com>
Thu, 10 May 2012 09:13:38 +0000 (12:13 +0300)
committerLuciano Coelho <coelho@ti.com>
Tue, 5 Jun 2012 12:55:53 +0000 (15:55 +0300)
The firmware uses the SCR_PAD2 register to read the board type passed
from the driver.  The values don't match the ones used in the mac and
phy configuration, so we need to map them before writing.  This commit
adds a translation table that is used when writing the board type to
SCR_PAD2.

Signed-off-by: Luciano Coelho <coelho@ti.com>
Signed-off-by: Arik Nemtsov <arik@wizery.com>
drivers/net/wireless/ti/wl18xx/main.c
drivers/net/wireless/ti/wl18xx/reg.h

index e5ebf4a14ba1c038ecd75004b33863604e39ef85..5214334c72c2177fd8845dc2c007ee4626e91e61 100644 (file)
 static char *ht_mode_param;
 static char *board_type_param;
 
+static const u32 wl18xx_board_type_to_scrpad2[NUM_BOARD_TYPES] = {
+       [BOARD_TYPE_FPGA_18XX]          = SCR_PAD2_BOARD_TYPE_FPGA,
+       [BOARD_TYPE_HDK_18XX]           = SCR_PAD2_BOARD_TYPE_HDK,
+       [BOARD_TYPE_DVP_EVB_18XX]       = SCR_PAD2_BOARD_TYPE_DVP_EVB,
+};
+
 static const u8 wl18xx_rate_to_idx_2ghz[] = {
        /* MCS rates are used only with 11n */
        15,                            /* WL18XX_CONF_HW_RXTX_RATE_MCS15 */
@@ -584,11 +590,11 @@ out:
 
 static void wl18xx_set_clk(struct wl1271 *wl)
 {
-       /*
-        * TODO: this is hardcoded just for DVP/EVB, fix according to
-        * new unified_drv.
-        */
-       wl1271_write32(wl, WL18XX_SCR_PAD2, 0xB3);
+       struct wl18xx_priv *priv = wl->priv;
+
+       /* write the translated board type to SCR_PAD2 */
+       wl1271_write32(wl, WL18XX_SCR_PAD2,
+                      wl18xx_board_type_to_scrpad2[priv->board_type]);
 
        wlcore_set_partition(wl, &wl->ptable[PART_TOP_PRCM_ELP_SOC]);
        wl1271_write32(wl, 0x00A02360, 0xD0078);
index 53987997f78f6191a1a3bfb76e41c5056a266edb..e0170aeba05c1e280d95a91ee629aa11138033c1 100644 (file)
@@ -154,6 +154,15 @@ enum {
        BOARD_TYPE_FPGA_18XX    = 0,
        BOARD_TYPE_HDK_18XX     = 1,
        BOARD_TYPE_DVP_EVB_18XX = 2,
+
+       NUM_BOARD_TYPES,
+};
+
+/* board type values used by the firmware in the SCR_PAD2 register */
+enum {
+       SCR_PAD2_BOARD_TYPE_FPGA        = 0xB1,
+       SCR_PAD2_BOARD_TYPE_HDK         = 0xB2,
+       SCR_PAD2_BOARD_TYPE_DVP_EVB     = 0xB3,
 };
 
 struct wl18xx_mac_and_phy_params {