Staging: silicom: bp_mod.h: checkpatch tab and space cleanup

eleventh chunk of bp_mod.h's cleanup

Signed-off-by: Daniel Cotey <puff65537@bansheeslibrary.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/staging/silicom/bp_mod.h b/drivers/staging/silicom/bp_mod.h
index 2862c5790c28da5d44c553fffa2a0b060c2b4667..f59c061660fee454458945bfa24825b800d29e64 100644 (file)
--- a/drivers/staging/silicom/bp_mod.h
+++ b/drivers/staging/silicom/bp_mod.h
@@ -463,28 +463,28 @@ static inline unsigned int jiffies_to_msecs(const unsigned long j)
         (pid == SILICOM_PE2G4BPFi35ZX_SSID))
 
 #define BP10G9_IF_SERIES(pid) \
-((pid==INTEL_PE210G2SPI9_SSID)|| \
-(pid==SILICOM_M1E10G2BPI9CX4_SSID)|| \
-(pid==SILICOM_M1E10G2BPI9SR_SSID)|| \
-(pid==SILICOM_M1E10G2BPI9LR_SSID)|| \
-(pid==SILICOM_M1E10G2BPI9T_SSID)|| \
-(pid==SILICOM_M2E10G2BPI9CX4_SSID)|| \
-(pid==SILICOM_M2E10G2BPI9SR_SSID)|| \
-(pid==SILICOM_M2E10G2BPI9LR_SSID)|| \
-(pid==SILICOM_M2E10G2BPI9T_SSID)|| \
-(pid==SILICOM_PE210G2BPI9CX4_SSID)|| \
-(pid==SILICOM_PE210G2BPI9SR_SSID)|| \
-(pid==SILICOM_PE210G2BPI9LR_SSID)|| \
-(pid==SILICOM_PE210G2DBi9SR_SSID)|| \
-(pid==SILICOM_PE210G2DBi9SRRB_SSID)|| \
-(pid==SILICOM_PE210G2DBi9LR_SSID)|| \
-(pid==SILICOM_PE210G2DBi9LRRB_SSID)|| \
-(pid==SILICOM_PE310G4DBi940SR_SSID)|| \
-(pid==SILICOM_PEG2BISC6_SSID)|| \
-(pid==SILICOM_PE310G4BPi9T_SSID)|| \
-(pid==SILICOM_PE310G4BPi9SR_SSID)|| \
-(pid==SILICOM_PE310G4BPi9LR_SSID)|| \
-(pid==SILICOM_PE210G2BPI9T_SSID))
+       ((pid == INTEL_PE210G2SPI9_SSID) || \
+        (pid == SILICOM_M1E10G2BPI9CX4_SSID) || \
+        (pid == SILICOM_M1E10G2BPI9SR_SSID) || \
+        (pid == SILICOM_M1E10G2BPI9LR_SSID) || \
+        (pid == SILICOM_M1E10G2BPI9T_SSID) || \
+        (pid == SILICOM_M2E10G2BPI9CX4_SSID) || \
+        (pid == SILICOM_M2E10G2BPI9SR_SSID) || \
+        (pid == SILICOM_M2E10G2BPI9LR_SSID) || \
+        (pid == SILICOM_M2E10G2BPI9T_SSID) || \
+        (pid == SILICOM_PE210G2BPI9CX4_SSID) || \
+        (pid == SILICOM_PE210G2BPI9SR_SSID) || \
+        (pid == SILICOM_PE210G2BPI9LR_SSID) || \
+        (pid == SILICOM_PE210G2DBi9SR_SSID) || \
+        (pid == SILICOM_PE210G2DBi9SRRB_SSID) || \
+        (pid == SILICOM_PE210G2DBi9LR_SSID) || \
+        (pid == SILICOM_PE210G2DBi9LRRB_SSID) || \
+        (pid == SILICOM_PE310G4DBi940SR_SSID) || \
+        (pid == SILICOM_PEG2BISC6_SSID) || \
+        (pid == SILICOM_PE310G4BPi9T_SSID) || \
+        (pid == SILICOM_PE310G4BPi9SR_SSID) || \
+        (pid == SILICOM_PE310G4BPi9LR_SSID) || \
+        (pid == SILICOM_PE210G2BPI9T_SSID))
 
 /*******************************************************/
 /* 1G INTERFACE ****************************************/