drm/nvc0: implement support for copy engines
authorBen Skeggs <bskeggs@redhat.com>
Fri, 1 Apr 2011 06:10:08 +0000 (16:10 +1000)
committerBen Skeggs <bskeggs@redhat.com>
Mon, 16 May 2011 00:48:53 +0000 (10:48 +1000)
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
drivers/gpu/drm/nouveau/Makefile
drivers/gpu/drm/nouveau/nouveau_drv.h
drivers/gpu/drm/nouveau/nouveau_state.c
drivers/gpu/drm/nouveau/nvc0_copy.c [new file with mode: 0644]
drivers/gpu/drm/nouveau/nvc0_copy.fuc.h [new file with mode: 0644]
drivers/gpu/drm/nouveau/nvc0_graph.c

index fc5702e8ce855c63c0c97cc5bcf9456ed03a60b8..240824218680800e16e1ebce73f9c835e80d85c2 100644 (file)
@@ -20,7 +20,7 @@ nouveau-y := nouveau_drv.o nouveau_state.o nouveau_channel.o nouveau_mem.o \
              nv40_graph.o nv50_graph.o nvc0_graph.o \
              nv40_grctx.o nv50_grctx.o nvc0_grctx.o \
              nv84_crypt.o \
-             nva3_copy.o \
+             nva3_copy.o nvc0_copy.o \
              nv04_instmem.o nv50_instmem.o nvc0_instmem.o \
              nv50_evo.o nv50_crtc.o nv50_dac.o nv50_sor.o \
              nv50_cursor.o nv50_display.o \
index 78db2850d9ea6aafa361f211eac09d59088e71a8..7dd52175c7784514de8d17c5624163189e661fb9 100644 (file)
@@ -1143,6 +1143,7 @@ extern int  nv50_graph_isr_chid(struct drm_device *dev, u64 inst);
 
 /* nvc0_graph.c */
 extern int  nvc0_graph_create(struct drm_device *);
+extern int  nvc0_graph_isr_chid(struct drm_device *dev, u64 inst);
 
 /* nv84_crypt.c */
 extern int  nv84_crypt_create(struct drm_device *);
index fa1e08510eb58e274444efe21bed36ed1742a593..769df653b76f396184cf359e540b8f89809d806a 100644 (file)
@@ -609,6 +609,10 @@ nouveau_card_init(struct drm_device *dev)
                        break;
                }
                break;
+       case NV_C0:
+               nvc0_copy_create(dev, 0);
+               nvc0_copy_create(dev, 1);
+               break;
        default:
                break;
        }
diff --git a/drivers/gpu/drm/nouveau/nvc0_copy.c b/drivers/gpu/drm/nouveau/nvc0_copy.c
new file mode 100644 (file)
index 0000000..208fa7a
--- /dev/null
@@ -0,0 +1,243 @@
+/*
+ * Copyright 2011 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
+
+#include <linux/firmware.h>
+#include "drmP.h"
+#include "nouveau_drv.h"
+#include "nouveau_util.h"
+#include "nouveau_vm.h"
+#include "nouveau_ramht.h"
+#include "nvc0_copy.fuc.h"
+
+struct nvc0_copy_engine {
+       struct nouveau_exec_engine base;
+       u32 irq;
+       u32 pmc;
+       u32 fuc;
+       u32 ctx;
+};
+
+static int
+nvc0_copy_context_new(struct nouveau_channel *chan, int engine)
+{
+       struct nvc0_copy_engine *pcopy = nv_engine(chan->dev, engine);
+       struct drm_device *dev = chan->dev;
+       struct drm_nouveau_private *dev_priv = dev->dev_private;
+       struct nouveau_gpuobj *ramin = chan->ramin;
+       struct nouveau_gpuobj *ctx = NULL;
+       int ret;
+
+       ret = nouveau_gpuobj_new(dev, NULL, 256, 256,
+                                NVOBJ_FLAG_VM | NVOBJ_FLAG_VM_USER |
+                                NVOBJ_FLAG_ZERO_ALLOC, &ctx);
+       if (ret)
+               return ret;
+
+       nv_wo32(ramin, pcopy->ctx + 0, lower_32_bits(ctx->vinst));
+       nv_wo32(ramin, pcopy->ctx + 4, upper_32_bits(ctx->vinst));
+       dev_priv->engine.instmem.flush(dev);
+
+       chan->engctx[engine] = ctx;
+       return 0;
+}
+
+static int
+nvc0_copy_object_new(struct nouveau_channel *chan, int engine,
+                    u32 handle, u16 class)
+{
+       return 0;
+}
+
+static void
+nvc0_copy_context_del(struct nouveau_channel *chan, int engine)
+{
+       struct nvc0_copy_engine *pcopy = nv_engine(chan->dev, engine);
+       struct nouveau_gpuobj *ctx = chan->engctx[engine];
+       struct drm_device *dev = chan->dev;
+       u32 inst;
+
+       inst  = (chan->ramin->vinst >> 12);
+       inst |= 0x40000000;
+
+       /* disable fifo access */
+       nv_wr32(dev, pcopy->fuc + 0x048, 0x00000000);
+       /* mark channel as unloaded if it's currently active */
+       if (nv_rd32(dev, pcopy->fuc + 0x050) == inst)
+               nv_mask(dev, pcopy->fuc + 0x050, 0x40000000, 0x00000000);
+       /* mark next channel as invalid if it's about to be loaded */
+       if (nv_rd32(dev, pcopy->fuc + 0x054) == inst)
+               nv_mask(dev, pcopy->fuc + 0x054, 0x40000000, 0x00000000);
+       /* restore fifo access */
+       nv_wr32(dev, pcopy->fuc + 0x048, 0x00000003);
+
+       nv_wo32(chan->ramin, pcopy->ctx + 0, 0x00000000);
+       nv_wo32(chan->ramin, pcopy->ctx + 4, 0x00000000);
+       nouveau_gpuobj_ref(NULL, &ctx);
+
+       chan->engctx[engine] = ctx;
+}
+
+static int
+nvc0_copy_init(struct drm_device *dev, int engine)
+{
+       struct nvc0_copy_engine *pcopy = nv_engine(dev, engine);
+       int i;
+
+       nv_mask(dev, 0x000200, pcopy->pmc, 0x00000000);
+       nv_mask(dev, 0x000200, pcopy->pmc, pcopy->pmc);
+       nv_wr32(dev, pcopy->fuc + 0x014, 0xffffffff);
+
+       nv_wr32(dev, pcopy->fuc + 0x1c0, 0x01000000);
+       for (i = 0; i < sizeof(nvc0_pcopy_data) / 4; i++)
+               nv_wr32(dev, pcopy->fuc + 0x1c4, nvc0_pcopy_data[i]);
+
+       nv_wr32(dev, pcopy->fuc + 0x180, 0x01000000);
+       for (i = 0; i < sizeof(nvc0_pcopy_code) / 4; i++) {
+               if ((i & 0x3f) == 0)
+                       nv_wr32(dev, pcopy->fuc + 0x188, i >> 6);
+               nv_wr32(dev, pcopy->fuc + 0x184, nvc0_pcopy_code[i]);
+       }
+
+       nv_wr32(dev, pcopy->fuc + 0x084, engine - NVOBJ_ENGINE_COPY0);
+       nv_wr32(dev, pcopy->fuc + 0x10c, 0x00000000);
+       nv_wr32(dev, pcopy->fuc + 0x104, 0x00000000); /* ENTRY */
+       nv_wr32(dev, pcopy->fuc + 0x100, 0x00000002); /* TRIGGER */
+       return 0;
+}
+
+static int
+nvc0_copy_fini(struct drm_device *dev, int engine)
+{
+       struct nvc0_copy_engine *pcopy = nv_engine(dev, engine);
+
+       nv_mask(dev, pcopy->fuc + 0x048, 0x00000003, 0x00000000);
+
+       /* trigger fuc context unload */
+       nv_wait(dev, pcopy->fuc + 0x008, 0x0000000c, 0x00000000);
+       nv_mask(dev, pcopy->fuc + 0x054, 0x40000000, 0x00000000);
+       nv_wr32(dev, pcopy->fuc + 0x000, 0x00000008);
+       nv_wait(dev, pcopy->fuc + 0x008, 0x00000008, 0x00000000);
+
+       nv_wr32(dev, pcopy->fuc + 0x014, 0xffffffff);
+       return 0;
+}
+
+static struct nouveau_enum nvc0_copy_isr_error_name[] = {
+       { 0x0001, "ILLEGAL_MTHD" },
+       { 0x0002, "INVALID_ENUM" },
+       { 0x0003, "INVALID_BITFIELD" },
+       {}
+};
+
+static void
+nvc0_copy_isr(struct drm_device *dev, int engine)
+{
+       struct nvc0_copy_engine *pcopy = nv_engine(dev, engine);
+       u32 disp = nv_rd32(dev, pcopy->fuc + 0x01c);
+       u32 stat = nv_rd32(dev, pcopy->fuc + 0x008) & disp & ~(disp >> 16);
+       u64 inst = (u64)(nv_rd32(dev, pcopy->fuc + 0x050) & 0x0fffffff) << 12;
+       u32 chid = nvc0_graph_isr_chid(dev, inst);
+       u32 ssta = nv_rd32(dev, pcopy->fuc + 0x040) & 0x0000ffff;
+       u32 addr = nv_rd32(dev, pcopy->fuc + 0x040) >> 16;
+       u32 mthd = (addr & 0x07ff) << 2;
+       u32 subc = (addr & 0x3800) >> 11;
+       u32 data = nv_rd32(dev, pcopy->fuc + 0x044);
+
+       if (stat & 0x00000040) {
+               NV_INFO(dev, "PCOPY: DISPATCH_ERROR [");
+               nouveau_enum_print(nvc0_copy_isr_error_name, ssta);
+               printk("] ch %d [0x%010llx] subc %d mthd 0x%04x data 0x%08x\n",
+                       chid, inst, subc, mthd, data);
+               nv_wr32(dev, pcopy->fuc + 0x004, 0x00000040);
+               stat &= ~0x00000040;
+       }
+
+       if (stat) {
+               NV_INFO(dev, "PCOPY: unhandled intr 0x%08x\n", stat);
+               nv_wr32(dev, pcopy->fuc + 0x004, stat);
+       }
+}
+
+static void
+nvc0_copy_isr_0(struct drm_device *dev)
+{
+       nvc0_copy_isr(dev, NVOBJ_ENGINE_COPY0);
+}
+
+static void
+nvc0_copy_isr_1(struct drm_device *dev)
+{
+       nvc0_copy_isr(dev, NVOBJ_ENGINE_COPY1);
+}
+
+static void
+nvc0_copy_destroy(struct drm_device *dev, int engine)
+{
+       struct nvc0_copy_engine *pcopy = nv_engine(dev, engine);
+
+       nouveau_irq_unregister(dev, pcopy->irq);
+
+       if (engine == NVOBJ_ENGINE_COPY0)
+               NVOBJ_ENGINE_DEL(dev, COPY0);
+       else
+               NVOBJ_ENGINE_DEL(dev, COPY1);
+       kfree(pcopy);
+}
+
+int
+nvc0_copy_create(struct drm_device *dev, int engine)
+{
+       struct nvc0_copy_engine *pcopy;
+
+       pcopy = kzalloc(sizeof(*pcopy), GFP_KERNEL);
+       if (!pcopy)
+               return -ENOMEM;
+
+       pcopy->base.destroy = nvc0_copy_destroy;
+       pcopy->base.init = nvc0_copy_init;
+       pcopy->base.fini = nvc0_copy_fini;
+       pcopy->base.context_new = nvc0_copy_context_new;
+       pcopy->base.context_del = nvc0_copy_context_del;
+       pcopy->base.object_new = nvc0_copy_object_new;
+
+       if (engine == 0) {
+               pcopy->irq = 5;
+               pcopy->pmc = 0x00000040;
+               pcopy->fuc = 0x104000;
+               pcopy->ctx = 0x0230;
+               nouveau_irq_register(dev, pcopy->irq, nvc0_copy_isr_0);
+               NVOBJ_ENGINE_ADD(dev, COPY0, &pcopy->base);
+               NVOBJ_CLASS(dev, 0x90b5, COPY0);
+       } else {
+               pcopy->irq = 6;
+               pcopy->pmc = 0x00000080;
+               pcopy->fuc = 0x105000;
+               pcopy->ctx = 0x0240;
+               nouveau_irq_register(dev, pcopy->irq, nvc0_copy_isr_1);
+               NVOBJ_ENGINE_ADD(dev, COPY1, &pcopy->base);
+               NVOBJ_CLASS(dev, 0x90b8, COPY1);
+       }
+
+       return 0;
+}
diff --git a/drivers/gpu/drm/nouveau/nvc0_copy.fuc.h b/drivers/gpu/drm/nouveau/nvc0_copy.fuc.h
new file mode 100644 (file)
index 0000000..4199038
--- /dev/null
@@ -0,0 +1,527 @@
+uint32_t nvc0_pcopy_data[] = {
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00010000,
+       0x00000000,
+       0x00000000,
+       0x00010040,
+       0x0001019f,
+       0x00000000,
+       0x00010050,
+       0x000101a1,
+       0x00000000,
+       0x00070080,
+       0x0000001c,
+       0xfffff000,
+       0x00000020,
+       0xfff80000,
+       0x00000024,
+       0xffffe000,
+       0x00000028,
+       0xfffff800,
+       0x0000002c,
+       0xfffff000,
+       0x00000030,
+       0xfff80000,
+       0x00000034,
+       0xffffe000,
+       0x00070088,
+       0x00000048,
+       0xfffff000,
+       0x0000004c,
+       0xfff80000,
+       0x00000050,
+       0xffffe000,
+       0x00000054,
+       0xfffff800,
+       0x00000058,
+       0xfffff000,
+       0x0000005c,
+       0xfff80000,
+       0x00000060,
+       0xffffe000,
+       0x000200c0,
+       0x000104b8,
+       0x00000000,
+       0x00010541,
+       0x00000000,
+       0x000e00c3,
+       0x00000010,
+       0xffffff00,
+       0x00000014,
+       0x0000000f,
+       0x0000003c,
+       0xffffff00,
+       0x00000040,
+       0x0000000f,
+       0x00000018,
+       0xfff80000,
+       0x00000044,
+       0xfff80000,
+       0x00000074,
+       0xffff0000,
+       0x00000078,
+       0xffffe000,
+       0x00000068,
+       0xfccc0000,
+       0x0000006c,
+       0x00000000,
+       0x00000070,
+       0x00000000,
+       0x00000004,
+       0xffffff00,
+       0x00000008,
+       0x00000000,
+       0x0000000c,
+       0x00000000,
+       0x00000800,
+};
+
+uint32_t nvc0_pcopy_code[] = {
+       0x04fe04bd,
+       0x3517f000,
+       0xf10010fe,
+       0xf1040017,
+       0xf0fff327,
+       0x22d00023,
+       0x0c25f0c0,
+       0xf40012d0,
+       0x17f11031,
+       0x27f01200,
+       0x0012d003,
+       0xf40031f4,
+       0x0ef40028,
+       0x8001cffd,
+       0xf40812c4,
+       0x21f4060b,
+       0x0412c4ca,
+       0xf5070bf4,
+       0xc4010221,
+       0x01d00c11,
+       0xf101f840,
+       0xfe770047,
+       0x47f1004b,
+       0x44cf2100,
+       0x0144f000,
+       0xb60444b6,
+       0xf7f13040,
+       0xf4b6061c,
+       0x1457f106,
+       0x00f5d101,
+       0xb6043594,
+       0x57fe0250,
+       0x0145fe00,
+       0x010052b7,
+       0x00ff67f1,
+       0x56fd60bd,
+       0x0253f004,
+       0xf80545fa,
+       0x0053f003,
+       0xd100e7f0,
+       0x549800fe,
+       0x0845b600,
+       0xb6015698,
+       0x46fd1864,
+       0x0047fe05,
+       0xf00204b9,
+       0x01f40643,
+       0x0604fa09,
+       0xfa060ef4,
+       0x03f80504,
+       0x27f100f8,
+       0x23cf1400,
+       0x1e3fc800,
+       0xf4170bf4,
+       0x21f40132,
+       0x1e3af053,
+       0xf00023d0,
+       0x24d00147,
+       0xcf00f880,
+       0x3dc84023,
+       0x090bf41e,
+       0xf40131f4,
+       0x37f05321,
+       0x8023d002,
+       0x37f100f8,
+       0x32cf1900,
+       0x0033cf40,
+       0x07ff24e4,
+       0xf11024b6,
+       0xbd010057,
+       0x5874bd64,
+       0x57580056,
+       0x0450b601,
+       0xf40446b8,
+       0x76bb4d08,
+       0x0447b800,
+       0xbb0f08f4,
+       0x74b60276,
+       0x0057bb03,
+       0xbbdf0ef4,
+       0x44b60246,
+       0x0045bb03,
+       0xfd014598,
+       0x54b00453,
+       0x201bf400,
+       0x58004558,
+       0x64b00146,
+       0x091bf400,
+       0xf4005380,
+       0x32f4300e,
+       0xf455f901,
+       0x0ef40c01,
+       0x0225f025,
+       0xf10125f0,
+       0xd0100047,
+       0x43d00042,
+       0x4027f040,
+       0xcf0002d0,
+       0x24f08002,
+       0x0024b040,
+       0xf1f71bf4,
+       0xf01d0027,
+       0x23d00137,
+       0xf800f800,
+       0x0027f100,
+       0xf034bd22,
+       0x23d00233,
+       0xf400f800,
+       0x01b0f030,
+       0x0101b000,
+       0xb00201b0,
+       0x04980301,
+       0x3045c71a,
+       0xc70150b6,
+       0x60b63446,
+       0x3847c701,
+       0xf40170b6,
+       0x84bd0232,
+       0x4ac494bd,
+       0x0445b60f,
+       0xa430b4bd,
+       0x0f18f404,
+       0xbbc0a5ff,
+       0x31f400cb,
+       0x220ef402,
+       0xf00c1bf4,
+       0xcbbb10c7,
+       0x160ef400,
+       0xf406a430,
+       0xc7f00c18,
+       0x00cbbb14,
+       0xf1070ef4,
+       0x380080c7,
+       0x80b601c8,
+       0x01b0b601,
+       0xf404b5b8,
+       0x90b6c308,
+       0x0497b801,
+       0xfdb208f4,
+       0x06800065,
+       0x1d08980e,
+       0xf40068fd,
+       0x64bd0502,
+       0x800075fd,
+       0x78fd1907,
+       0x1057f100,
+       0x0654b608,
+       0xd00056d0,
+       0x50b74057,
+       0x06980800,
+       0x0162b619,
+       0x980864b6,
+       0x72b60e07,
+       0x0567fd01,
+       0xb70056d0,
+       0xb4010050,
+       0x56d00060,
+       0x0160b400,
+       0xb44056d0,
+       0x56d00260,
+       0x0360b480,
+       0xb7c056d0,
+       0x98040050,
+       0x56d01b06,
+       0x1c069800,
+       0xf44056d0,
+       0x00f81030,
+       0xc7075798,
+       0x78c76879,
+       0x0380b664,
+       0xb06077c7,
+       0x1bf40e76,
+       0x0477f009,
+       0xf00f0ef4,
+       0x70b6027c,
+       0x0947fd11,
+       0x980677f0,
+       0x5b980c5a,
+       0x00abfd0e,
+       0xbb01b7f0,
+       0xb2b604b7,
+       0xc4abff01,
+       0x9805a7bb,
+       0xe7f00d5d,
+       0x04e8bb01,
+       0xff01e2b6,
+       0xd8bbb4de,
+       0x01e0b605,
+       0xbb0cef94,
+       0xfefd02eb,
+       0x026cf005,
+       0x020860b7,
+       0xd00864b6,
+       0xb7bb006f,
+       0x00cbbb04,
+       0x98085f98,
+       0xfbfd0e5b,
+       0x01b7f000,
+       0xb604b7bb,
+       0xfbbb01b2,
+       0x05f7bb00,
+       0x5f98f0f9,
+       0x01b7f009,
+       0xb604b8bb,
+       0xfbbb01b2,
+       0x05f8bb00,
+       0x78bbf0f9,
+       0x0282b600,
+       0xbb01b7f0,
+       0xb9bb04b8,
+       0x0b589804,
+       0xbb01e7f0,
+       0xe2b604e9,
+       0xf48eff01,
+       0xbb04f7bb,
+       0x79bb00cf,
+       0x0589bb00,
+       0x90fcf0fc,
+       0xbb00d9fd,
+       0x89fd00ad,
+       0x008ffd00,
+       0xbb00a8bb,
+       0x92b604a7,
+       0x0497bb01,
+       0x988069d0,
+       0x58980557,
+       0x00acbb04,
+       0xb6007abb,
+       0x84b60081,
+       0x058bfd10,
+       0x060062b7,
+       0xb70067d0,
+       0xd0040060,
+       0x00f80068,
+       0xb7026cf0,
+       0xb6020260,
+       0x57980864,
+       0x0067d005,
+       0x040060b7,
+       0xb6045798,
+       0x67d01074,
+       0x0060b700,
+       0x06579804,
+       0xf80067d0,
+       0xf900f900,
+       0x0007f110,
+       0x0604b608,
+       0xf00001cf,
+       0x1bf40114,
+       0xfc10fcfa,
+       0xc800f800,
+       0x1bf40d34,
+       0xd121f570,
+       0x0c47f103,
+       0x0644b608,
+       0xb6020598,
+       0x45d00450,
+       0x4040d000,
+       0xd00c57f0,
+       0x40b78045,
+       0x05980400,
+       0x1054b601,
+       0xb70045d0,
+       0xf1050040,
+       0xf00b0057,
+       0x45d00153,
+       0x4057f100,
+       0x0154b640,
+       0x808053f1,
+       0xf14045d0,
+       0xf1111057,
+       0xd0131253,
+       0x57f18045,
+       0x53f11514,
+       0x45d01716,
+       0x0157f1c0,
+       0x0153f026,
+       0x080047f1,
+       0xd00644b6,
+       0x21f50045,
+       0x47f103d1,
+       0x44b6080c,
+       0x02059806,
+       0xd00045d0,
+       0x57f04040,
+       0x8045d004,
+       0x040040b7,
+       0xb6010598,
+       0x45d01054,
+       0x0040b700,
+       0x0057f105,
+       0x0045d003,
+       0x111057f1,
+       0x131253f1,
+       0x984045d0,
+       0x40b70305,
+       0x45d00500,
+       0x0157f100,
+       0x0153f026,
+       0x080047f1,
+       0xd00644b6,
+       0x00f80045,
+       0x03d121f5,
+       0xf4003fc8,
+       0x21f50e0b,
+       0x47f101af,
+       0x0ef40200,
+       0x1067f11e,
+       0x0664b608,
+       0x800177f0,
+       0x07800e07,
+       0x1d079819,
+       0xd00067d0,
+       0x44bd4067,
+       0xbd0232f4,
+       0x043fc854,
+       0xf50a0bf4,
+       0xf403a821,
+       0x21f50a0e,
+       0x49f0029c,
+       0x0231f407,
+       0xc82c57f0,
+       0x0bf4083f,
+       0xa821f50a,
+       0x0a0ef403,
+       0x029c21f5,
+       0xf10849f0,
+       0xb6080057,
+       0x06980654,
+       0x4056d01e,
+       0xf14167f0,
+       0xfd440063,
+       0x54d00546,
+       0x0c3fc800,
+       0xf5070bf4,
+       0xf803eb21,
+       0x0027f100,
+       0xf034bd22,
+       0x23d00133,
+       0x0000f800,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+};
index e8473c0068452bec4886319f503392e7fb7a1f21..31a177fa23f82dc3af7be1756289b0a7f4de4e70 100644 (file)
@@ -531,7 +531,7 @@ nvc0_graph_init(struct drm_device *dev, int engine)
        return 0;
 }
 
-static int
+int
 nvc0_graph_isr_chid(struct drm_device *dev, u64 inst)
 {
        struct drm_nouveau_private *dev_priv = dev->dev_private;