x86/intel_rdt: Turn off most RDT features on Skylake
authorTony Luck <tony.luck@intel.com>
Thu, 24 Aug 2017 16:26:52 +0000 (09:26 -0700)
committerThomas Gleixner <tglx@linutronix.de>
Fri, 25 Aug 2017 20:00:45 +0000 (22:00 +0200)
Errata list is included in this document:
https://www.intel.com/content/dam/www/public/us/en/documents/specification-updates/6th-gen-x-series-spec-update.pdf
with more details in:
https://www.intel.com/content/www/us/en/processors/xeon/scalable/xeon-scalable-spec-update.html

But the tl;dr summary (using tags from first of the documents) is:
SKZ4  MBM does not accurately track write bandwidth
SKZ17 CMT counters may not count accurately
SKZ18 CAT may not restrict cacheline allocation under certain conditions
SKZ19 MBM counters may undercount

Disable all these features on Skylake models. Users who understand the
errata may re-enable using boot command line options.

Signed-off-by: Tony Luck <tony.luck@intel.com>
Cc: Fenghua" <fenghua.yu@intel.com>
Cc: Ravi V" <ravi.v.shankar@intel.com>
Cc: "Peter Zijlstra" <peterz@infradead.org>
Cc: "Stephane Eranian" <eranian@google.com>
Cc: "Andi Kleen" <ak@linux.intel.com>
Cc: "David Carrillo-Cisneros" <davidcc@google.com>
Cc: Vikas Shivappa <vikas.shivappa@linux.intel.com>
Link: http://lkml.kernel.org/r/3aea0a3bae219062c812668bd9b7b8f1a25003ba.1503512900.git.tony.luck@intel.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
arch/x86/kernel/cpu/intel_rdt.c

index b641622003cfc8db18d1d8b2c4842e825e62a610..cd5fc61ba45020f66bb8e619b4c033eb6b786a63 100644 (file)
@@ -769,6 +769,9 @@ static __init void rdt_quirks(void)
                if (!rdt_options[RDT_FLAG_L3_CAT].force_off)
                        cache_alloc_hsw_probe();
                break;
+       case INTEL_FAM6_SKYLAKE_X:
+               if (boot_cpu_data.x86_mask <= 4)
+                       set_rdt_options("!cmt,!mbmtotal,!mbmlocal,!l3cat");
        }
 }