staging: rtl8192u: fix a dubious looking mask before a shift
authorColin Ian King <colin.king@canonical.com>
Thu, 16 Jul 2020 15:47:20 +0000 (16:47 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 21 Aug 2020 07:48:09 +0000 (09:48 +0200)
[ Upstream commit c4283950a9a4d3bf4a3f362e406c80ab14f10714 ]

Currently the masking of ret with 0xff and followed by a right shift
of 8 bits always leaves a zero result.  It appears the mask of 0xff
is incorrect and should be 0xff00, but I don't have the hardware to
test this. Fix this to mask the upper 8 bits before shifting.

[ Not tested ]

Addresses-Coverity: ("Operands don't affect result")
Fixes: 8fc8598e61f6 ("Staging: Added Realtek rtl8192u driver to staging")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Link: https://lore.kernel.org/r/20200716154720.1710252-1-colin.king@canonical.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/staging/rtl8192u/r8192U_core.c

index fbbd1b59dc11d3011e5f45a3e3788ba8c0b50653..b5941ae410d9a38295a659511f096569aa7c77df 100644 (file)
@@ -2519,7 +2519,7 @@ static int rtl8192_read_eeprom_info(struct net_device *dev)
                                ret = eprom_read(dev, (EEPROM_TxPwIndex_CCK >> 1));
                                if (ret < 0)
                                        return ret;
-                               priv->EEPROMTxPowerLevelCCK = ((u16)ret & 0xff) >> 8;
+                               priv->EEPROMTxPowerLevelCCK = ((u16)ret & 0xff00) >> 8;
                        } else
                                priv->EEPROMTxPowerLevelCCK = 0x10;
                        RT_TRACE(COMP_EPROM, "CCK Tx Power Levl: 0x%02x\n", priv->EEPROMTxPowerLevelCCK);