PD#SWPL-17658
Problem:
ARB timing setting is too large, it will cause
cec cts 9.6.1 fail
Solution:
reducec ARB timing
Verify:
sm1-AC214
Change-Id: If6bab18b729fc6f1dc010aa6289dc3e887a0f6f6
Signed-off-by: Yong Qin <yong.qin@amlogic.com>
reg = 0;
reg |= (0 << 6);/*curb_err_init*/
reg |= (0 << 5);/*en_chk_sbitlow*/
- reg |= (0x15 << 0);/*rise_del_max*/
+ reg |= (CEC_B_ARB_TIME << 0);/*rise_del_max*/
hdmirx_cec_write(DWC_CEC_CTRL2, reg);
}
reg = 0;
reg |= (0 << 6);/*curb_err_init*/
reg |= (0 << 5);/*en_chk_sbitlow*/
- reg |= (0x15 << 0);/*rise_del_max*/
+ reg |= (CEC_B_ARB_TIME << 0);/*rise_del_max*/
hdmirx_cec_write(DWC_CEC_CTRL2, reg);
}
} else {
#ifndef __AO_CEC_H__
#define __AO_CEC_H__
-#define CEC_DRIVER_VERSION "2019/10/22: finetune ARB rising time\n"
+#define CEC_DRIVER_VERSION "2019/12/01:finetune ARB time, cause cts 9.6.1\n"
#define CEC_FRAME_DELAY msecs_to_jiffies(400)
#define CEC_DEV_NAME "cec"
#define ENABLE_ONE_CEC 1
#define ENABLE_TWO_CEC 2
+#define CEC_B_ARB_TIME 8
+
/*
#define CEC_FUNC_MASK 0
#define ONE_TOUCH_PLAY_MASK 1