cec: cec b ARB timing cause cec 9.6.1 fail [1/1]
authorYong Qin <yong.qin@amlogic.com>
Sun, 1 Dec 2019 07:41:26 +0000 (15:41 +0800)
committerYong Qin <yong.qin@amlogic.com>
Mon, 2 Dec 2019 08:29:40 +0000 (01:29 -0700)
PD#SWPL-17658

Problem:
ARB timing setting is too large, it will cause
cec cts 9.6.1 fail

Solution:
reducec ARB timing

Verify:
sm1-AC214

Change-Id: If6bab18b729fc6f1dc010aa6289dc3e887a0f6f6
Signed-off-by: Yong Qin <yong.qin@amlogic.com>
drivers/amlogic/cec/hdmi_ao_cec.c
drivers/amlogic/cec/hdmi_ao_cec.h

index 907436fdb5a496e14f5f7bd1577d4fe43d71b44c..fc6fc0f2049a17a040708df8a650bd07046211d9 100644 (file)
@@ -707,7 +707,7 @@ static void ao_cecb_init(void)
                        reg = 0;
                        reg |= (0 << 6);/*curb_err_init*/
                        reg |= (0 << 5);/*en_chk_sbitlow*/
-                       reg |= (0x15 << 0);/*rise_del_max*/
+                       reg |= (CEC_B_ARB_TIME << 0);/*rise_del_max*/
                        hdmirx_cec_write(DWC_CEC_CTRL2, reg);
                }
 
@@ -1164,7 +1164,7 @@ void cec_hw_reset(unsigned int cec_sel)
                        reg = 0;
                        reg |= (0 << 6);/*curb_err_init*/
                        reg |= (0 << 5);/*en_chk_sbitlow*/
-                       reg |= (0x15 << 0);/*rise_del_max*/
+                       reg |= (CEC_B_ARB_TIME << 0);/*rise_del_max*/
                        hdmirx_cec_write(DWC_CEC_CTRL2, reg);
                }
        } else {
index daa3629760d24fedd4685cd59e52350b9f62ca89..7828f794198998de04f82332b236c9fad72a91f3 100644 (file)
@@ -18,7 +18,7 @@
 #ifndef __AO_CEC_H__
 #define __AO_CEC_H__
 
-#define CEC_DRIVER_VERSION     "2019/10/22: finetune ARB rising time\n"
+#define CEC_DRIVER_VERSION     "2019/12/01:finetune ARB time, cause cts 9.6.1\n"
 
 #define CEC_FRAME_DELAY                msecs_to_jiffies(400)
 #define CEC_DEV_NAME           "cec"
@@ -83,6 +83,8 @@ enum cecbver {
 #define ENABLE_ONE_CEC 1
 #define ENABLE_TWO_CEC 2
 
+#define CEC_B_ARB_TIME 8
+
 /*
 #define CEC_FUNC_MASK                  0
 #define ONE_TOUCH_PLAY_MASK            1