arm64: dts: hisi: add pinctrl dtsi file for HiKey960 development board
authorWang Xiaoyin <hw.wangxiaoyin@hisilicon.com>
Thu, 30 Mar 2017 06:48:03 +0000 (14:48 +0800)
committerWei Xu <xuwei5@hisilicon.com>
Mon, 10 Apr 2017 15:34:26 +0000 (23:34 +0800)
Add pinctrl dtsi file for HiKey960 development board, enable
5 pinmux devices and 1 pinconf device, also include some nodes
of configurations for pins.

Signed-off-by: Wang Xiaoyin <hw.wangxiaoyin@hisilicon.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
arch/arm64/boot/dts/hisilicon/hikey960-pinctrl.dtsi [new file with mode: 0644]

index ff37f0a0aa939db0a54b3718d611f40f851203cf..186251ffc6b200d7e1be4544aae67b98e6d56c4b 100644 (file)
@@ -8,6 +8,7 @@
 /dts-v1/;
 
 #include "hi3660.dtsi"
+#include "hikey960-pinctrl.dtsi"
 
 / {
        model = "HiKey960";
diff --git a/arch/arm64/boot/dts/hisilicon/hikey960-pinctrl.dtsi b/arch/arm64/boot/dts/hisilicon/hikey960-pinctrl.dtsi
new file mode 100644 (file)
index 0000000..719c4bc
--- /dev/null
@@ -0,0 +1,407 @@
+/*
+ * pinctrl dts fils for Hislicon HiKey960 development board
+ *
+ */
+
+#include <dt-bindings/pinctrl/hisi.h>
+
+/ {
+       soc {
+               /* [IOMG_000, IOMG_123] */
+               range: gpio-range {
+                       #pinctrl-single,gpio-range-cells = <3>;
+               };
+
+               pmx0: pinmux@e896c000 {
+                       compatible = "pinctrl-single";
+                       reg = <0x0 0xe896c000 0x0 0x1f0>;
+                       #pinctrl-cells = <1>;
+                       #gpio-range-cells = <0x3>;
+                       pinctrl-single,register-width = <0x20>;
+                       pinctrl-single,function-mask = <0x7>;
+                       /* pin base, nr pins & gpio function */
+                       pinctrl-single,gpio-range = <
+                               &range 0 7 0
+                               &range 8 116 0>;
+
+                       isp0_pmx_func: isp0_pmx_func {
+                               pinctrl-single,pins = <
+                                       0x058 MUX_M1 /* ISP_CLK0 */
+                                       0x064 MUX_M1 /* ISP_SCL0 */
+                                       0x068 MUX_M1 /* ISP_SDA0 */
+                               >;
+                       };
+
+                       isp1_pmx_func: isp1_pmx_func {
+                               pinctrl-single,pins = <
+                                       0x05c MUX_M1 /* ISP_CLK1 */
+                                       0x06c MUX_M1 /* ISP_SCL1 */
+                                       0x070 MUX_M1 /* ISP_SDA1 */
+                               >;
+                       };
+
+                       i2c3_pmx_func: i2c3_pmx_func {
+                               pinctrl-single,pins = <
+                                       0x02c MUX_M1 /* I2C3_SCL */
+                                       0x030 MUX_M1 /* I2C3_SDA */
+                               >;
+                       };
+
+                       i2c4_pmx_func: i2c4_pmx_func {
+                               pinctrl-single,pins = <
+                                       0x090 MUX_M1 /* I2C4_SCL */
+                                       0x094 MUX_M1 /* I2C4_SDA */
+                               >;
+                       };
+
+                       pcie_perstn_pmx_func: pcie_perstn_pmx_func {
+                               pinctrl-single,pins = <
+                                       0x15c MUX_M1 /* PCIE_PERST_N */
+                               >;
+                       };
+
+                       usbhub5734_pmx_func: usbhub5734_pmx_func {
+                               pinctrl-single,pins = <
+                                       0x11c MUX_M0 /* GPIO_073 */
+                                       0x120 MUX_M0 /* GPIO_074 */
+                               >;
+                       };
+
+                       spi1_pmx_func: spi1_pmx_func {
+                               pinctrl-single,pins = <
+                                       0x034 MUX_M1 /* SPI1_CLK */
+                                       0x038 MUX_M1 /* SPI1_DI */
+                                       0x03c MUX_M1 /* SPI1_DO */
+                                       0x040 MUX_M1 /* SPI1_CS_N */
+                               >;
+                       };
+
+                       uart0_pmx_func: uart0_pmx_func {
+                               pinctrl-single,pins = <
+                                       0x0cc MUX_M2 /* UART0_RXD */
+                                       0x0d0 MUX_M2 /* UART0_TXD */
+                                       0x0d4 MUX_M2 /* UART0_RXD_M */
+                                       0x0d8 MUX_M2 /* UART0_TXD_M */
+                               >;
+                       };
+
+                       uart1_pmx_func: uart1_pmx_func {
+                               pinctrl-single,pins = <
+                                       0x0b0 MUX_M2 /* UART1_CTS_N */
+                                       0x0b4 MUX_M2 /* UART1_RTS_N */
+                                       0x0a8 MUX_M2 /* UART1_RXD */
+                                       0x0ac MUX_M2 /* UART1_TXD */
+                               >;
+                       };
+
+                       uart2_pmx_func: uart2_pmx_func {
+                               pinctrl-single,pins = <
+                                       0x0bc MUX_M2 /* UART2_CTS_N */
+                                       0x0c0 MUX_M2 /* UART2_RTS_N */
+                                       0x0c8 MUX_M2 /* UART2_RXD */
+                                       0x0c4 MUX_M2 /* UART2_TXD */
+                               >;
+                       };
+
+                       uart3_pmx_func: uart3_pmx_func {
+                               pinctrl-single,pins = <
+                                       0x0dc MUX_M1 /* UART3_CTS_N */
+                                       0x0e0 MUX_M1 /* UART3_RTS_N */
+                                       0x0e4 MUX_M1 /* UART3_RXD */
+                                       0x0e8 MUX_M1 /* UART3_TXD */
+                               >;
+                       };
+
+                       uart4_pmx_func: uart4_pmx_func {
+                               pinctrl-single,pins = <
+                                       0x0ec MUX_M1 /* UART4_CTS_N */
+                                       0x0f0 MUX_M1 /* UART4_RTS_N */
+                                       0x0f4 MUX_M1 /* UART4_RXD */
+                                       0x0f8 MUX_M1 /* UART4_TXD */
+                               >;
+                       };
+
+                       uart5_pmx_func: uart5_pmx_func {
+                               pinctrl-single,pins = <
+                                       0x0c4 MUX_M3 /* UART5_CTS_N */
+                                       0x0c8 MUX_M3 /* UART5_RTS_N */
+                                       0x0bc MUX_M3 /* UART5_RXD */
+                                       0x0c0 MUX_M3 /* UART5_TXD */
+                               >;
+                       };
+
+                       uart6_pmx_func: uart6_pmx_func {
+                               pinctrl-single,pins = <
+                                       0x0cc MUX_M1 /* UART6_CTS_N */
+                                       0x0d0 MUX_M1 /* UART6_RTS_N */
+                                       0x0d4 MUX_M1 /* UART6_RXD */
+                                       0x0d8 MUX_M1 /* UART6_TXD */
+                               >;
+                       };
+               };
+
+               /* [IOMG_MMC0_000, IOMG_MMC0_005] */
+               pmx1: pinmux@ff37e000 {
+                       compatible = "pinctrl-single";
+                       reg = <0x0 0xff37e000 0x0 0x18>;
+                       #gpio-range-cells = <0x3>;
+                       #pinctrl-cells = <1>;
+                       pinctrl-single,register-width = <0x20>;
+                       pinctrl-single,function-mask = <0x7>;
+                       /* pin base, nr pins & gpio function */
+                       pinctrl-single,gpio-range = <&range 0 6 0>;
+
+                       sd_pmx_func: sd_pmx_func {
+                               pinctrl-single,pins = <
+                                       0x000 MUX_M1 /* SD_CLK */
+                                       0x004 MUX_M1 /* SD_CMD */
+                                       0x008 MUX_M1 /* SD_DATA0 */
+                                       0x00c MUX_M1 /* SD_DATA1 */
+                                       0x010 MUX_M1 /* SD_DATA2 */
+                                       0x014 MUX_M1 /* SD_DATA3 */
+                               >;
+                       };
+               };
+
+               /* [IOMG_FIX_000, IOMG_FIX_011] */
+               pmx2: pinmux@ff3b6000 {
+                       compatible = "pinctrl-single";
+                       reg = <0x0 0xff3b6000 0x0 0x30>;
+                       #pinctrl-cells = <1>;
+                       #gpio-range-cells = <0x3>;
+                       pinctrl-single,register-width = <0x20>;
+                       pinctrl-single,function-mask = <0x7>;
+                       /* pin base, nr pins & gpio function */
+                       pinctrl-single,gpio-range = <&range 0 12 0>;
+
+                       spi3_pmx_func: spi3_pmx_func {
+                               pinctrl-single,pins = <
+                                       0x008 MUX_M1 /* SPI3_CLK */
+                                       0x00c MUX_M1 /* SPI3_DI */
+                                       0x010 MUX_M1 /* SPI3_DO */
+                                       0x014 MUX_M1 /* SPI3_CS0_N */
+                               >;
+                       };
+               };
+
+               /* [IOMG_MMC1_000, IOMG_MMC1_005] */
+               pmx3: pinmux@ff3fd000 {
+                       compatible = "pinctrl-single";
+                       reg = <0x0 0xff3fd000 0x0 0x18>;
+                       #pinctrl-cells = <1>;
+                       #gpio-range-cells = <0x3>;
+                       pinctrl-single,register-width = <0x20>;
+                       pinctrl-single,function-mask = <0x7>;
+                       /* pin base, nr pins & gpio function */
+                       pinctrl-single,gpio-range = <&range 0 6 0>;
+
+                       sdio_pmx_func: sdio_pmx_func {
+                               pinctrl-single,pins = <
+                                       0x000 MUX_M1 /* SDIO_CLK */
+                                       0x004 MUX_M1 /* SDIO_CMD */
+                                       0x008 MUX_M1 /* SDIO_DATA0 */
+                                       0x00c MUX_M1 /* SDIO_DATA1 */
+                                       0x010 MUX_M1 /* SDIO_DATA2 */
+                                       0x014 MUX_M1 /* SDIO_DATA3 */
+                               >;
+                       };
+               };
+
+               /* [IOMG_AO_000, IOMG_AO_041] */
+               pmx4: pinmux@fff11000 {
+                       compatible = "pinctrl-single";
+                       reg = <0x0 0xfff11000 0x0 0xa8>;
+                       #pinctrl-cells = <1>;
+                       #gpio-range-cells = <0x3>;
+                       pinctrl-single,register-width = <0x20>;
+                       pinctrl-single,function-mask = <0x7>;
+                       /* pin base in node, nr pins & gpio function */
+                       pinctrl-single,gpio-range = <&range 0 42 0>;
+
+                       i2s2_pmx_func: i2s2_pmx_func {
+                               pinctrl-single,pins = <
+                                       0x044 MUX_M1 /* I2S2_DI */
+                                       0x048 MUX_M1 /* I2S2_DO */
+                                       0x04c MUX_M1 /* I2S2_XCLK */
+                                       0x050 MUX_M1 /* I2S2_XFS */
+                               >;
+                       };
+
+                       slimbus_pmx_func: slimbus_pmx_func {
+                               pinctrl-single,pins = <
+                                       0x02c MUX_M1 /* SLIMBUS_CLK */
+                                       0x030 MUX_M1 /* SLIMBUS_DATA */
+                               >;
+                       };
+
+                       i2c0_pmx_func: i2c0_pmx_func {
+                               pinctrl-single,pins = <
+                                       0x014 MUX_M1 /* I2C0_SCL */
+                                       0x018 MUX_M1 /* I2C0_SDA */
+                               >;
+                       };
+
+                       i2c1_pmx_func: i2c1_pmx_func {
+                               pinctrl-single,pins = <
+                                       0x01c MUX_M1 /* I2C1_SCL */
+                                       0x020 MUX_M1 /* I2C1_SDA */
+                               >;
+                       };
+
+                       i2c2_pmx_func: i2c2_pmx_func {
+                               pinctrl-single,pins = <
+                                       0x024 MUX_M1 /* I2C2_SCL */
+                                       0x028 MUX_M1 /* I2C2_SDA */
+                               >;
+                       };
+
+                       i2c7_pmx_func: i2c7_pmx_func {
+                               pinctrl-single,pins = <
+                                       0x024 MUX_M3 /* I2C7_SCL */
+                                       0x028 MUX_M3 /* I2C7_SDA */
+                               >;
+                       };
+
+                       spi2_pmx_func: spi2_pmx_func {
+                               pinctrl-single,pins = <
+                                       0x08c MUX_M1 /* SPI2_CLK */
+                                       0x090 MUX_M1 /* SPI2_DI */
+                                       0x094 MUX_M1 /* SPI2_DO */
+                                       0x098 MUX_M1 /* SPI2_CS0_N */
+                               >;
+                       };
+
+                       spi4_pmx_func: spi4_pmx_func {
+                               pinctrl-single,pins = <
+                                       0x08c MUX_M4 /* SPI4_CLK */
+                                       0x090 MUX_M4 /* SPI4_DI */
+                                       0x094 MUX_M4 /* SPI4_DO */
+                                       0x098 MUX_M4 /* SPI4_CS0_N */
+                               >;
+                       };
+
+                       i2s0_pmx_func: i2s0_pmx_func {
+                               pinctrl-single,pins = <
+                                       0x034 MUX_M1 /* I2S0_DI */
+                                       0x038 MUX_M1 /* I2S0_DO */
+                                       0x03c MUX_M1 /* I2S0_XCLK */
+                                       0x040 MUX_M1 /* I2S0_XFS */
+                               >;
+                       };
+               };
+
+               pmx5: pinmux@ff3fd800 {
+                       compatible = "pinconf-single";
+                       reg = <0x0 0xff3fd800 0x0 0x18>;
+                       #pinctrl-cells = <1>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       pinctrl-single,register-width = <32>;
+
+                       sdio_clk_cfg_func: sdio_clk_cfg_func {
+                               pinctrl-single,pins = <
+                                       0x000 0x0 /* SDIO_CLK */
+                               >;
+                               pinctrl-single,bias-pulldown = <
+                                       PULL_DIS
+                                       PULL_DOWN
+                                       PULL_DIS
+                                       PULL_DOWN
+                               >;
+                               pinctrl-single,bias-pullup = <
+                                       PULL_DIS
+                                       PULL_UP
+                                       PULL_DIS
+                                       PULL_UP
+                               >;
+                               pinctrl-single,drive-strength = <
+                                       DRIVE6_32MA
+                                       DRIVE6_MASK
+                               >;
+                       };
+
+                       sdio_cfg_func: sdio_cfg_func {
+                               pinctrl-single,pins = <
+                                       0x004 0x0 /* SDIO_CMD */
+                                       0x008 0x0 /* SDIO_DATA0 */
+                                       0x00c 0x0 /* SDIO_DATA1 */
+                                       0x010 0x0 /* SDIO_DATA2 */
+                                       0x014 0x0 /* SDIO_DATA3 */
+                               >;
+                               pinctrl-single,bias-pulldown = <
+                                       PULL_DIS
+                                       PULL_DOWN
+                                       PULL_DIS
+                                       PULL_DOWN
+                               >;
+                               pinctrl-single,bias-pullup = <
+                                       PULL_UP
+                                       PULL_UP
+                                       PULL_DIS
+                                       PULL_UP
+                               >;
+                               pinctrl-single,drive-strength = <
+                                       DRIVE6_19MA
+                                       DRIVE6_MASK
+                               >;
+                       };
+               };
+
+               pmx6: pinmux@ff37e800 {
+                       compatible = "pinconf-single";
+                       reg = <0x0 0xff37e800 0x0 0x18>;
+                       #pinctrl-cells = <1>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       pinctrl-single,register-width = <32>;
+
+                       sd_clk_cfg_func: sd_clk_cfg_func {
+                               pinctrl-single,pins = <
+                                       0x000 0x0 /* SD_CLK */
+                               >;
+                               pinctrl-single,bias-pulldown = <
+                                       PULL_DIS
+                                       PULL_DOWN
+                                       PULL_DIS
+                                       PULL_DOWN
+                               >;
+                               pinctrl-single,bias-pullup = <
+                                       PULL_DIS
+                                       PULL_UP
+                                       PULL_DIS
+                                       PULL_UP
+                               >;
+                               pinctrl-single,drive-strength = <
+                                       DRIVE6_32MA
+                                       DRIVE6_MASK
+                               >;
+                       };
+
+                       sd_cfg_func: sd_cfg_func {
+                               pinctrl-single,pins = <
+                                       0x004 0x0 /* SD_CMD */
+                                       0x008 0x0 /* SD_DATA0 */
+                                       0x00c 0x0 /* SD_DATA1 */
+                                       0x010 0x0 /* SD_DATA2 */
+                                       0x014 0x0 /* SD_DATA3 */
+                               >;
+                               pinctrl-single,bias-pulldown = <
+                                       PULL_DIS
+                                       PULL_DOWN
+                                       PULL_DIS
+                                       PULL_DOWN
+                               >;
+                               pinctrl-single,bias-pullup = <
+                                       PULL_UP
+                                       PULL_UP
+                                       PULL_DIS
+                                       PULL_UP
+                               >;
+                               pinctrl-single,drive-strength = <
+                                       DRIVE6_19MA
+                                       DRIVE6_MASK
+                               >;
+                       };
+               };
+       };
+};