[ARM] Move common definition of MAX_DMA_ADDRESS to asm/dma.h
authorRussell King <rmk@dyn-67.arm.linux.org.uk>
Wed, 4 Jan 2006 15:30:48 +0000 (15:30 +0000)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Wed, 4 Jan 2006 15:30:48 +0000 (15:30 +0000)
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
16 files changed:
include/asm-arm/arch-aaec2000/dma.h
include/asm-arm/arch-clps711x/dma.h
include/asm-arm/arch-ebsa110/dma.h
include/asm-arm/arch-ebsa285/dma.h
include/asm-arm/arch-epxa10db/dma.h
include/asm-arm/arch-imx/dma.h
include/asm-arm/arch-integrator/dma.h
include/asm-arm/arch-iop3xx/dma.h
include/asm-arm/arch-ixp2000/dma.h
include/asm-arm/arch-lh7a40x/dma.h
include/asm-arm/arch-omap/dma.h
include/asm-arm/arch-pxa/dma.h
include/asm-arm/arch-realview/dma.h
include/asm-arm/arch-sa1100/dma.h
include/asm-arm/arch-versatile/dma.h
include/asm-arm/dma.h

index 28c890b4a1d379bb3e94ea9dbcd100337c34e544..c42212c9ea79b89db2bddace6d6f2f14990459ae 100644 (file)
@@ -11,7 +11,6 @@
 #ifndef __ASM_ARCH_DMA_H
 #define __ASM_ARCH_DMA_H
 
-#define MAX_DMA_ADDRESS         0xffffffff
 #define MAX_DMA_CHANNELS        0
 
 #endif
index 3c4c5c843252627198546e864877625975a81b49..c35f87d0bf7a705dcf42706b488d5a4a92539e35 100644 (file)
@@ -20,8 +20,6 @@
 #ifndef __ASM_ARCH_DMA_H
 #define __ASM_ARCH_DMA_H
 
-#define MAX_DMA_ADDRESS                0xffffffff
-
 #define MAX_DMA_CHANNELS       0
 
 #endif /* _ASM_ARCH_DMA_H */
index d491776ac1cc813b01bd0b0bdd55360c2444ac8d..f1add1343edc012251ca24f9dc52b5cc936aaee4 100644 (file)
@@ -12,7 +12,6 @@
 #ifndef __ASM_ARCH_DMA_H
 #define __ASM_ARCH_DMA_H
 
-#define MAX_DMA_ADDRESS                0xffffffff
 #define MAX_DMA_CHANNELS       0
 
 #endif /* _ASM_ARCH_DMA_H */
index c43046eb8bc7cfc889c051606b653a3aca6d0565..0259ad45d33c7ba3cfd6d1ddfea8ab058ab82a61 100644 (file)
@@ -9,11 +9,6 @@
 #ifndef __ASM_ARCH_DMA_H
 #define __ASM_ARCH_DMA_H
 
-/*
- * This is the maximum DMA address that can be DMAd to.
- */
-#define MAX_DMA_ADDRESS                0xffffffff
-
 /*
  * The 21285 has two internal DMA channels; we call these 8 and 9.
  * On CATS hardware we have an additional eight ISA dma channels
index 5d97734d1077969c7544ea40641fd5f1e826cc85..6e13e6bb8b1ddf49ad78da34f636c2b1ce3794d0 100644 (file)
@@ -20,8 +20,6 @@
 #ifndef __ASM_ARCH_DMA_H
 #define __ASM_ARCH_DMA_H
 
-#define MAX_DMA_ADDRESS                0xffffffff
-
 #define MAX_DMA_CHANNELS       0
 
 #endif /* _ASM_ARCH_DMA_H */
index dbdc017804131fec86a17a38c36babcfb8d40a37..0b8f39adc9a707ce0dddf71960f016d184d55603 100644 (file)
@@ -20,8 +20,6 @@
 #ifndef __ASM_ARCH_DMA_H
 #define __ASM_ARCH_DMA_H
 
-#define MAX_DMA_ADDRESS                0xffffffff
-
 #define MAX_DMA_CHANNELS       0
 
 /*
index 7171792290bdf24c94e7333e9f31f009b7685ce8..6f934f6d838ab0601c1d66001da8bcded62e5fca 100644 (file)
@@ -20,8 +20,6 @@
 #ifndef __ASM_ARCH_DMA_H
 #define __ASM_ARCH_DMA_H
 
-#define MAX_DMA_ADDRESS                0xffffffff
-
 #define MAX_DMA_CHANNELS       0
 
 #endif /* _ASM_ARCH_DMA_H */
index 797f9e6fc745343773a2f31131e0cb7437cf1d21..58ec24db415dce25ec0aa16ba66a1a4c7b9e16f8 100644 (file)
@@ -11,6 +11,4 @@
 #ifndef _IOP3XX_DMA_H_P
 #define _IOP3XX_DMA_H_P
 
-#define MAX_DMA_ADDRESS                0xffffffff
-
 #endif /* _ASM_ARCH_DMA_H_P */
index 0fb3568a98dd5255be94c7544e9412a728755314..3af382551cda6d844500298673e15706da582086 100644 (file)
@@ -10,8 +10,6 @@
 #ifndef __ASM_ARCH_DMA_H
 #define __ASM_ARCH_DMA_H
 
-#define MAX_DMA_ADDRESS                0xffffffff
-
 /* No DMA */
 #define MAX_DMA_CHANNELS       0
 
index 5797f01e18441ce40de67cc83763832c1940f032..18f13689a405c605587eb153f18a9801dba0b6a0 100644 (file)
@@ -11,7 +11,6 @@
 #ifndef __ASM_ARCH_DMA_H
 #define __ASM_ARCH_DMA_H
 
-#define MAX_DMA_ADDRESS                0xffffffff
 #define MAX_DMA_CHANNELS       0 /* All DMA is internal to CPU */
 
 #endif /* _ASM_ARCH_DMA_H */
index ccbcb580a5c17b90326c8c9c679cfe737d0d908d..40c04540461321217fc2dd718f0ed1dbd207b442 100644 (file)
@@ -21,7 +21,6 @@
 #ifndef __ASM_ARCH_DMA_H
 #define __ASM_ARCH_DMA_H
 
-#define MAX_DMA_ADDRESS                        0xffffffff
 #define MAX_DMA_CHANNELS               0
 
 /* Hardware registers for omap1 */
index 56db3d49bfc8130cc00c42913b4e99e93628bcbc..7402bdafc1639c12796dc4930b04b4ffbbf1097a 100644 (file)
@@ -12,8 +12,6 @@
 #ifndef __ASM_ARCH_DMA_H
 #define __ASM_ARCH_DMA_H
 
-#define MAX_DMA_ADDRESS                0xffffffff
-
 /* No DMA as the rest of the world see it */
 #define MAX_DMA_CHANNELS       0
 
index 744491a74bd9c592188935dabaf2e3f773ed3f28..d595cc90b069103b5f62a2792f314933eefb2fd7 100644 (file)
@@ -21,7 +21,6 @@
 #ifndef __ASM_ARCH_DMA_H
 #define __ASM_ARCH_DMA_H
 
-#define MAX_DMA_ADDRESS                0xffffffff
 #define MAX_DMA_CHANNELS       0
 
 #endif /* _ASM_ARCH_DMA_H */
index 3d60ed9f8c34b3017ed2cfcb26d8b3191ebb443e..a79c2d37c6690d6c654d6c57de8dc0f88d365cce 100644 (file)
 #include "hardware.h"
 
 
-/*
- * This is the maximum DMA address that can be DMAd to.
- */
-#define MAX_DMA_ADDRESS                0xffffffff
-
-
 /*
  * The regular generic DMA interface is inappropriate for the
  * SA1100 DMA model.  None of the SA1100 specific drivers using
index dcc8ac26eac0d5be514deffeebe6fc84ec2aed90..94b3fc5a6321fba1f9e553f3d90606834cce99eb 100644 (file)
@@ -21,7 +21,6 @@
 #ifndef __ASM_ARCH_DMA_H
 #define __ASM_ARCH_DMA_H
 
-#define MAX_DMA_ADDRESS                0xffffffff
 #define MAX_DMA_CHANNELS       0
 
 #endif /* _ASM_ARCH_DMA_H */
index 1c7087f9364c1b485658213d5241fe4cc898c360..49c01e2bf7c8f7b6a7afad9fc4ba71ca60240329 100644 (file)
@@ -9,6 +9,13 @@ typedef unsigned int dmach_t;
 #include <asm/scatterlist.h>
 #include <asm/arch/dma.h>
 
+/*
+ * This is the maximum virtual address which can be DMA'd from.
+ */
+#ifndef MAX_DMA_ADDRESS
+#define MAX_DMA_ADDRESS        0xffffffff
+#endif
+
 /*
  * DMA modes
  */