#ifndef __ASM_ARCH_DMA_H
#define __ASM_ARCH_DMA_H
-#define MAX_DMA_ADDRESS 0xffffffff
#define MAX_DMA_CHANNELS 0
#endif
#ifndef __ASM_ARCH_DMA_H
#define __ASM_ARCH_DMA_H
-#define MAX_DMA_ADDRESS 0xffffffff
-
#define MAX_DMA_CHANNELS 0
#endif /* _ASM_ARCH_DMA_H */
#ifndef __ASM_ARCH_DMA_H
#define __ASM_ARCH_DMA_H
-#define MAX_DMA_ADDRESS 0xffffffff
#define MAX_DMA_CHANNELS 0
#endif /* _ASM_ARCH_DMA_H */
#ifndef __ASM_ARCH_DMA_H
#define __ASM_ARCH_DMA_H
-/*
- * This is the maximum DMA address that can be DMAd to.
- */
-#define MAX_DMA_ADDRESS 0xffffffff
-
/*
* The 21285 has two internal DMA channels; we call these 8 and 9.
* On CATS hardware we have an additional eight ISA dma channels
#ifndef __ASM_ARCH_DMA_H
#define __ASM_ARCH_DMA_H
-#define MAX_DMA_ADDRESS 0xffffffff
-
#define MAX_DMA_CHANNELS 0
#endif /* _ASM_ARCH_DMA_H */
#ifndef __ASM_ARCH_DMA_H
#define __ASM_ARCH_DMA_H
-#define MAX_DMA_ADDRESS 0xffffffff
-
#define MAX_DMA_CHANNELS 0
/*
#ifndef __ASM_ARCH_DMA_H
#define __ASM_ARCH_DMA_H
-#define MAX_DMA_ADDRESS 0xffffffff
-
#define MAX_DMA_CHANNELS 0
#endif /* _ASM_ARCH_DMA_H */
#ifndef _IOP3XX_DMA_H_P
#define _IOP3XX_DMA_H_P
-#define MAX_DMA_ADDRESS 0xffffffff
-
#endif /* _ASM_ARCH_DMA_H_P */
#ifndef __ASM_ARCH_DMA_H
#define __ASM_ARCH_DMA_H
-#define MAX_DMA_ADDRESS 0xffffffff
-
/* No DMA */
#define MAX_DMA_CHANNELS 0
#ifndef __ASM_ARCH_DMA_H
#define __ASM_ARCH_DMA_H
-#define MAX_DMA_ADDRESS 0xffffffff
#define MAX_DMA_CHANNELS 0 /* All DMA is internal to CPU */
#endif /* _ASM_ARCH_DMA_H */
#ifndef __ASM_ARCH_DMA_H
#define __ASM_ARCH_DMA_H
-#define MAX_DMA_ADDRESS 0xffffffff
#define MAX_DMA_CHANNELS 0
/* Hardware registers for omap1 */
#ifndef __ASM_ARCH_DMA_H
#define __ASM_ARCH_DMA_H
-#define MAX_DMA_ADDRESS 0xffffffff
-
/* No DMA as the rest of the world see it */
#define MAX_DMA_CHANNELS 0
#ifndef __ASM_ARCH_DMA_H
#define __ASM_ARCH_DMA_H
-#define MAX_DMA_ADDRESS 0xffffffff
#define MAX_DMA_CHANNELS 0
#endif /* _ASM_ARCH_DMA_H */
#include "hardware.h"
-/*
- * This is the maximum DMA address that can be DMAd to.
- */
-#define MAX_DMA_ADDRESS 0xffffffff
-
-
/*
* The regular generic DMA interface is inappropriate for the
* SA1100 DMA model. None of the SA1100 specific drivers using
#ifndef __ASM_ARCH_DMA_H
#define __ASM_ARCH_DMA_H
-#define MAX_DMA_ADDRESS 0xffffffff
#define MAX_DMA_CHANNELS 0
#endif /* _ASM_ARCH_DMA_H */
#include <asm/scatterlist.h>
#include <asm/arch/dma.h>
+/*
+ * This is the maximum virtual address which can be DMA'd from.
+ */
+#ifndef MAX_DMA_ADDRESS
+#define MAX_DMA_ADDRESS 0xffffffff
+#endif
+
/*
* DMA modes
*/