ARM: dts: meson8: add the pins for the SDIO controller
authorMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Thu, 15 Jun 2017 21:33:46 +0000 (23:33 +0200)
committerKevin Hilman <khilman@baylibre.com>
Fri, 16 Jun 2017 19:07:10 +0000 (12:07 -0700)
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
arch/arm/boot/dts/meson8.dtsi

index 5ff7903964c61d65eeaef65e37e457b344272155..bb3608bddc987964aca2f8b2cf54ea546209cb6e 100644 (file)
                        gpio-ranges = <&pinctrl_cbus 0 0 120>;
                };
 
+               sd_a_pins: sd-a {
+                       mux {
+                               groups = "sd_d0_a", "sd_d1_a", "sd_d2_a",
+                                       "sd_d3_a", "sd_clk_a", "sd_cmd_a";
+                               function = "sd_a";
+                       };
+               };
+
+               sd_b_pins: sd-b {
+                       mux {
+                               groups = "sd_d0_b", "sd_d1_b", "sd_d2_b",
+                                       "sd_d3_b", "sd_clk_b", "sd_cmd_b";
+                               function = "sd_b";
+                       };
+               };
+
+               sd_c_pins: sd-c {
+                       mux {
+                               groups = "sd_d0_c", "sd_d1_c", "sd_d2_c",
+                                       "sd_d3_c", "sd_clk_c", "sd_cmd_c";
+                               function = "sd_c";
+                       };
+               };
+
                spi_nor_pins: nor {
                        mux {
                                groups = "nor_d", "nor_q", "nor_c", "nor_cs";