pinctrl: Amend bindings for STM32 pinctrl

Adds "ngpios" and "gpio-ranges" bindings definition.

Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

diff --git a/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt
index 620c09b3d8014c6efbb888b28b939be3bb338ef5..eac20aa33907a647377571995cb3f863dc8df27d 100644 (file)
--- a/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt
@@ -38,8 +38,23 @@ Optional properties:
  - st,syscfg: Should be phandle/offset pair. The phandle to the syscon node
    which includes IRQ mux selection register, and the offset of the IRQ mux
    selection register.
+ - ngpios: Number of gpios in a bank (to use if bank gpio numbers is less
+   than 16).
+ - gpio-ranges: Define a dedicated mapping between a pin-controller and
+   a gpio controller. Format is <&phandle a b c> with:
+       -(phandle): phandle of pin-controller.
+       -(a): gpio base offset in range.
+       -(b): pin base offset in range.
+       -(c): gpio count in range
+   This entry has to be used either if there are holes inside a bank:
+       GPIOB0/B1/B2/B14/B15 (see example 2)
+   or if banks are not contiguous:
+       GPIOA/B/C/E...
+   NOTE: If "gpio-ranges" is used for a gpio controller, all gpio-controller
+   have to use a "gpio-ranges" entry.
+   More details in Documentation/devicetree/bindings/gpio/gpio.txt.
 
-Example:
+Example 1:
 #include <dt-bindings/pinctrl/stm32f429-pinfunc.h>
 ...
 
@@ -61,6 +76,43 @@ Example:
                pin-functions nodes follow...
        };
 
+Example 2:
+#include <dt-bindings/pinctrl/stm32f429-pinfunc.h>
+...
+
+       pinctrl: pin-controller {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "st,stm32f429-pinctrl";
+               ranges = <0 0x40020000 0x3000>;
+               pins-are-numbered;
+
+               gpioa: gpio@40020000 {
+                       gpio-controller;
+                       #gpio-cells = <2>;
+                       reg = <0x0 0x400>;
+                       resets = <&reset_ahb1 0>;
+                       st,bank-name = "GPIOA";
+                       gpio-ranges = <&pinctrl 0 0 16>;
+               };
+
+               gpiob: gpio@40020400 {
+                       gpio-controller;
+                       #gpio-cells = <2>;
+                       reg = <0x0 0x400>;
+                       resets = <&reset_ahb1 0>;
+                       st,bank-name = "GPIOB";
+                       ngpios = 4;
+                       gpio-ranges = <&pinctrl 0 16 3>,
+                                     <&pinctrl 14 30 2>;
+               };
+
+
+               ...
+               pin-functions nodes follow...
+       };
+
+
 Contents of function subnode node:
 ----------------------------------
 Subnode format