perf, x86: Reorder intel_pmu_enable_all()
authorPeter Zijlstra <a.p.zijlstra@chello.nl>
Mon, 8 Mar 2010 12:57:14 +0000 (13:57 +0100)
committerIngo Molnar <mingo@elte.hu>
Wed, 10 Mar 2010 12:23:37 +0000 (13:23 +0100)
The documentation says we have to enable PEBS before we enable the PMU
proper.

Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Arnaldo Carvalho de Melo <acme@infradead.org>
Cc: paulus@samba.org
Cc: eranian@google.com
Cc: robert.richter@amd.com
Cc: fweisbec@gmail.com
LKML-Reference: <new-submission>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
arch/x86/kernel/cpu/perf_event_intel.c

index c135ed735b223f1640f581598a5158ca8f8e73f5..d3e2424069a795cae331b74658b23838f5277645 100644 (file)
@@ -487,6 +487,8 @@ static void intel_pmu_enable_all(void)
 {
        struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
 
+       intel_pmu_pebs_enable_all();
+       intel_pmu_lbr_enable_all();
        wrmsrl(MSR_CORE_PERF_GLOBAL_CTRL, x86_pmu.intel_ctrl);
 
        if (test_bit(X86_PMC_IDX_FIXED_BTS, cpuc->active_mask)) {
@@ -498,9 +500,6 @@ static void intel_pmu_enable_all(void)
 
                intel_pmu_enable_bts(event->hw.config);
        }
-
-       intel_pmu_pebs_enable_all();
-       intel_pmu_lbr_enable_all();
 }
 
 static inline u64 intel_pmu_get_status(void)