add simple control if clock, fix PMU delay
authorKasin Lee <kasin.li@amlogic.com>
Fri, 6 Sep 2013 08:29:06 +0000 (16:29 +0800)
committerKasin Lee <kasin.li@amlogic.com>
Fri, 6 Sep 2013 08:29:06 +0000 (16:29 +0800)
mali/Kbuild
mali/Kconfig
mali/platform/meson6pre/meson_main.c
mali/platform/meson8/meson_main.c

index 0baf528b2be04a00376325c346663e1a71d03194..d3cd4e46c0f4d8bbff2b61e8e0465e1f4bdf9adc 100644 (file)
@@ -12,9 +12,9 @@
 
 OSKOS=linux
 
-TARGET_PLATFORM=meson6pre
+TARGET_PLATFORM:=meson6pre
 ifeq ($(CONFIG_ARCH_MESON8),y)
-TARGET_PLATFORM = meson8
+TARGET_PLATFORM:= meson8
 endif
 
 # set up defaults if not defined by the user
@@ -36,7 +36,7 @@ OS_MEMORY_KERNEL_BUFFER_SIZE_IN_MB ?= 16
 ifeq ($(CONFIG_MALI400_PROFILING),y)
        USING_GPU_UTILIZATION ?= 1
 else
-       USING_GPU_UTILIZATION ?= 0
+       USING_GPU_UTILIZATION ?= 1
 endif
 PROFILING_SKIP_PP_JOBS ?= 0
 PROFILING_SKIP_PP_AND_GP_JOBS ?= 0
@@ -126,13 +126,13 @@ mali-y += \
        __malidrv_build_info.o
 
 ifeq ($(TARGET_PLATFORM),meson6pre)
-MALI_PLATFORM_FILES = platform/meson6pre/mali_fix.c \
+MALI_PLATFORM_FILES:= platform/meson6pre/mali_fix.c \
                        platform/meson6pre/mali_platform.c \
                        platform/meson6pre/meson_main.c
 endif
 
 ifeq ($(TARGET_PLATFORM),meson8)
-MALI_PLATFORM_FILES = platform/meson8/arm_core_scaling.c \
+MALI_PLATFORM_FILES:= platform/meson8/arm_core_scaling.c \
                        platform/meson8/meson_main.c
 endif
 
index 47082400e87d930c3216d927f1aa55397f5c4015..2691a499c429a8dafab3c07854d310d3bc797d72 100644 (file)
@@ -62,6 +62,14 @@ config MALI400_UMP
        ---help---
          This enables support for the UMP memory sharing API in the Mali driver.
 
+if ARCH_MESON6TV
+config MALI400_4_PP
+       bool "Mali 400 for M6TV With 4 pp core."
+       depends on MALI400
+       ---help---
+         M6TV Lite only have 4 mali pp cores.
+endif
+         
 config MALI_DMA_BUF_MAP_ON_ATTACH
        bool "Map dma-buf attachments on attach"
        depends on MALI400 && DMA_SHARED_BUFFER
index d909c81d6cade17f2ddf747da147f48ffd8be82b..03d6206a40fd42f12a7d2aec92df46b57c245d9f 100755 (executable)
@@ -55,6 +55,7 @@ static int mali_runtime_idle(struct device *device);
 #define INT_MALI_PP3_MMU (61+32)
 #define INT_MALI_PP4_MMU (63+32)
 
+#ifndef CONFIG_MALI400_4_PP
 static struct resource meson_mali_resources[] =
 {
        MALI_GPU_RESOURCES_MALI400_MP2(0xd0060000, 
@@ -62,6 +63,18 @@ static struct resource meson_mali_resources[] =
                        INT_MALI_PP, INT_MALI_PP_MMU, 
                        INT_MALI_PP2, INT_MALI_PP2_MMU)
 };
+#else
+static struct resource meson_mali_resources[] =
+{
+       MALI_GPU_RESOURCES_MALI400_MP4(0xd0060000, 
+                       INT_MALI_GP, INT_MALI_GP_MMU, 
+                       INT_MALI_PP, INT_MALI_PP_MMU, 
+                       INT_MALI_PP2, INT_MALI_PP2_MMU,
+                       INT_MALI_PP3, INT_MALI_PP3_MMU,
+                       INT_MALI_PP4, INT_MALI_PP4_MMU
+                       )
+};
+#endif
 
 #elif MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON6
 
index c39a800de9ec7618e644bed133e57933830500fa..96f0192729dbe676e1536d9a79dfc6810c85bf88 100755 (executable)
 #include <linux/platform_device.h>
 #include <linux/version.h>
 #include <linux/pm.h>
+#include <mach/register.h>
+#include <linux/io.h>
+#include <mach/io.h>
+#include <plat/io.h>
 #ifdef CONFIG_PM_RUNTIME
 #include <linux/pm_runtime.h>
 #endif
@@ -21,7 +25,6 @@
 #include "arm_core_scaling.h"
 
 static void mali_platform_device_release(struct device *device);
-
 static void mali_platform_device_release(struct device *device);
 static int mali_os_suspend(struct device *device);
 static int mali_os_resume(struct device *device);
@@ -33,6 +36,8 @@ static int mali_runtime_resume(struct device *device);
 static int mali_runtime_idle(struct device *device);
 #endif
 
+static DEFINE_SPINLOCK(lock);
+
 void mali_gpu_utilization_callback(struct mali_gpu_utilization_data *data);
 
 #define INT_MALI_GP                    (160)
@@ -51,16 +56,25 @@ void mali_gpu_utilization_callback(struct mali_gpu_utilization_data *data);
 #define INT_MALI_PP5_MMU       (175)
 #define INT_MALI_PP_BCAST      (162)
 
+#define MALI_CTRL_ADDR 0xd00c0000
+
 static struct resource mali_gpu_resources_m450[] =
 {
-       MALI_GPU_RESOURCES_MALI450_MP6_PMU(0xd00c0000, INT_MALI_GP, INT_MALI_GP_MMU, 
+#if 1
+       MALI_GPU_RESOURCES_MALI450_MP6_PMU(MALI_CTRL_ADDR, INT_MALI_GP, INT_MALI_GP_MMU, 
                                INT_MALI_PP0, INT_MALI_PP0_MMU, 
                                INT_MALI_PP1, INT_MALI_PP1_MMU, 
                                INT_MALI_PP2, INT_MALI_PP2_MMU, 
                                INT_MALI_PP3, INT_MALI_PP3_MMU, 
                                INT_MALI_PP4, INT_MALI_PP4_MMU, 
-                               INT_MALI_PP4, INT_MALI_PP4_MMU,
+                               INT_MALI_PP5, INT_MALI_PP5_MMU,
+                               INT_MALI_PP_BCAST)
+#else 
+MALI_GPU_RESOURCES_MALI450_MP2_PMU(MALI_CTRL_ADDR, INT_MALI_GP, INT_MALI_GP_MMU, 
+                               INT_MALI_PP0, INT_MALI_PP0_MMU, 
+                               INT_MALI_PP1, INT_MALI_PP1_MMU, 
                                INT_MALI_PP_BCAST)
+#endif
 };
 
 static struct dev_pm_ops mali_gpu_device_type_pm_ops =
@@ -106,14 +120,22 @@ static struct mali_gpu_device_data mali_gpu_data =
        .fb_size = 0x06000000,
        .utilization_interval = 1000, /* 1000ms */
        .utilization_callback = mali_gpu_utilization_callback,
-       .pmu_switch_delay = 0xFF, /* do not have to be this high on FPGA, but it is good for testing to have a delay */
+       .pmu_switch_delay = 0xFFFF, /* do not have to be this high on FPGA, but it is good for testing to have a delay */
 };
 
 int mali_platform_device_register(void)
 {
+       unsigned long flags;
        int err = -1;
        int num_pp_cores = 6;
 
+       spin_lock_irqsave(&lock, flags);
+       clrbits_le32(P_HHI_MALI_CLK_CNTL, 1 << 8);
+       writel((5 << 9 | 0), P_HHI_MALI_CLK_CNTL); /* set clock to 333MHZ.*/
+       readl(P_HHI_MALI_CLK_CNTL);
+       setbits_le32(P_HHI_MALI_CLK_CNTL, 1 << 8);
+       spin_unlock_irqrestore(&lock, flags);
+
        if (mali_gpu_data.shared_mem_size < 10) {
                MALI_DEBUG_PRINT(2, ("mali os memory didn't configered, set to default(512M)\n"));
                mali_gpu_data.shared_mem_size = 512 * 1024 *1024;
@@ -148,7 +170,6 @@ int mali_platform_device_register(void)
 
                platform_device_unregister(&mali_gpu_device);
        }
-
        return err;
 }
 
@@ -258,7 +279,6 @@ static int mali_runtime_suspend(struct device *device)
        }
 
        /* clock scaling. Kasin..*/
-
        return ret;
 }