OSKOS=linux
-TARGET_PLATFORM=meson6pre
+TARGET_PLATFORM:=meson6pre
ifeq ($(CONFIG_ARCH_MESON8),y)
-TARGET_PLATFORM = meson8
+TARGET_PLATFORM:= meson8
endif
# set up defaults if not defined by the user
ifeq ($(CONFIG_MALI400_PROFILING),y)
USING_GPU_UTILIZATION ?= 1
else
- USING_GPU_UTILIZATION ?= 0
+ USING_GPU_UTILIZATION ?= 1
endif
PROFILING_SKIP_PP_JOBS ?= 0
PROFILING_SKIP_PP_AND_GP_JOBS ?= 0
__malidrv_build_info.o
ifeq ($(TARGET_PLATFORM),meson6pre)
-MALI_PLATFORM_FILES = platform/meson6pre/mali_fix.c \
+MALI_PLATFORM_FILES:= platform/meson6pre/mali_fix.c \
platform/meson6pre/mali_platform.c \
platform/meson6pre/meson_main.c
endif
ifeq ($(TARGET_PLATFORM),meson8)
-MALI_PLATFORM_FILES = platform/meson8/arm_core_scaling.c \
+MALI_PLATFORM_FILES:= platform/meson8/arm_core_scaling.c \
platform/meson8/meson_main.c
endif
#define INT_MALI_PP3_MMU (61+32)
#define INT_MALI_PP4_MMU (63+32)
+#ifndef CONFIG_MALI400_4_PP
static struct resource meson_mali_resources[] =
{
MALI_GPU_RESOURCES_MALI400_MP2(0xd0060000,
INT_MALI_PP, INT_MALI_PP_MMU,
INT_MALI_PP2, INT_MALI_PP2_MMU)
};
+#else
+static struct resource meson_mali_resources[] =
+{
+ MALI_GPU_RESOURCES_MALI400_MP4(0xd0060000,
+ INT_MALI_GP, INT_MALI_GP_MMU,
+ INT_MALI_PP, INT_MALI_PP_MMU,
+ INT_MALI_PP2, INT_MALI_PP2_MMU,
+ INT_MALI_PP3, INT_MALI_PP3_MMU,
+ INT_MALI_PP4, INT_MALI_PP4_MMU
+ )
+};
+#endif
#elif MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON6
#include <linux/platform_device.h>
#include <linux/version.h>
#include <linux/pm.h>
+#include <mach/register.h>
+#include <linux/io.h>
+#include <mach/io.h>
+#include <plat/io.h>
#ifdef CONFIG_PM_RUNTIME
#include <linux/pm_runtime.h>
#endif
#include "arm_core_scaling.h"
static void mali_platform_device_release(struct device *device);
-
static void mali_platform_device_release(struct device *device);
static int mali_os_suspend(struct device *device);
static int mali_os_resume(struct device *device);
static int mali_runtime_idle(struct device *device);
#endif
+static DEFINE_SPINLOCK(lock);
+
void mali_gpu_utilization_callback(struct mali_gpu_utilization_data *data);
#define INT_MALI_GP (160)
#define INT_MALI_PP5_MMU (175)
#define INT_MALI_PP_BCAST (162)
+#define MALI_CTRL_ADDR 0xd00c0000
+
static struct resource mali_gpu_resources_m450[] =
{
- MALI_GPU_RESOURCES_MALI450_MP6_PMU(0xd00c0000, INT_MALI_GP, INT_MALI_GP_MMU,
+#if 1
+ MALI_GPU_RESOURCES_MALI450_MP6_PMU(MALI_CTRL_ADDR, INT_MALI_GP, INT_MALI_GP_MMU,
INT_MALI_PP0, INT_MALI_PP0_MMU,
INT_MALI_PP1, INT_MALI_PP1_MMU,
INT_MALI_PP2, INT_MALI_PP2_MMU,
INT_MALI_PP3, INT_MALI_PP3_MMU,
INT_MALI_PP4, INT_MALI_PP4_MMU,
- INT_MALI_PP4, INT_MALI_PP4_MMU,
+ INT_MALI_PP5, INT_MALI_PP5_MMU,
+ INT_MALI_PP_BCAST)
+#else
+MALI_GPU_RESOURCES_MALI450_MP2_PMU(MALI_CTRL_ADDR, INT_MALI_GP, INT_MALI_GP_MMU,
+ INT_MALI_PP0, INT_MALI_PP0_MMU,
+ INT_MALI_PP1, INT_MALI_PP1_MMU,
INT_MALI_PP_BCAST)
+#endif
};
static struct dev_pm_ops mali_gpu_device_type_pm_ops =
.fb_size = 0x06000000,
.utilization_interval = 1000, /* 1000ms */
.utilization_callback = mali_gpu_utilization_callback,
- .pmu_switch_delay = 0xFF, /* do not have to be this high on FPGA, but it is good for testing to have a delay */
+ .pmu_switch_delay = 0xFFFF, /* do not have to be this high on FPGA, but it is good for testing to have a delay */
};
int mali_platform_device_register(void)
{
+ unsigned long flags;
int err = -1;
int num_pp_cores = 6;
+ spin_lock_irqsave(&lock, flags);
+ clrbits_le32(P_HHI_MALI_CLK_CNTL, 1 << 8);
+ writel((5 << 9 | 0), P_HHI_MALI_CLK_CNTL); /* set clock to 333MHZ.*/
+ readl(P_HHI_MALI_CLK_CNTL);
+ setbits_le32(P_HHI_MALI_CLK_CNTL, 1 << 8);
+ spin_unlock_irqrestore(&lock, flags);
+
if (mali_gpu_data.shared_mem_size < 10) {
MALI_DEBUG_PRINT(2, ("mali os memory didn't configered, set to default(512M)\n"));
mali_gpu_data.shared_mem_size = 512 * 1024 *1024;
platform_device_unregister(&mali_gpu_device);
}
-
return err;
}
}
/* clock scaling. Kasin..*/
-
return ret;
}