i915.semaphores = intel_sanitize_semaphores(dev_priv, i915.semaphores);
DRM_DEBUG_DRIVER("use GPU semaphores? %s\n", yesno(i915.semaphores));
+
+ intel_uc_sanitize_options(dev_priv);
}
/**
struct drm_i915_private *dev_priv = guc_to_i915(guc);
const char *fw_path;
- if (!HAS_GUC(dev_priv)) {
- i915.enable_guc_loading = 0;
- i915.enable_guc_submission = 0;
- } else {
- /* A negative value means "use platform default" */
- if (i915.enable_guc_loading < 0)
- i915.enable_guc_loading = HAS_GUC_UCODE(dev_priv);
- if (i915.enable_guc_submission < 0)
- i915.enable_guc_submission = HAS_GUC_SCHED(dev_priv);
- }
-
- if (!HAS_GUC_UCODE(dev_priv)) {
- fw_path = NULL;
- } else if (IS_SKYLAKE(dev_priv)) {
+ if (IS_SKYLAKE(dev_priv)) {
fw_path = I915_SKL_GUC_UCODE;
guc->fw.major_ver_wanted = SKL_FW_MAJOR;
guc->fw.minor_ver_wanted = SKL_FW_MINOR;
guc->fw.fetch_status = INTEL_UC_FIRMWARE_NONE;
guc->fw.load_status = INTEL_UC_FIRMWARE_NONE;
- /* Early (and silent) return if GuC loading is disabled */
- if (!i915.enable_guc_loading)
- return;
if (fw_path == NULL)
return;
if (*fw_path == '\0')
huc->fw.load_status = INTEL_UC_FIRMWARE_NONE;
huc->fw.fw = INTEL_UC_FW_TYPE_HUC;
- if (!HAS_HUC_UCODE(dev_priv))
- return;
-
if (IS_SKYLAKE(dev_priv)) {
fw_path = I915_SKL_HUC_UCODE;
huc->fw.major_ver_wanted = SKL_HUC_FW_MAJOR;
#include "intel_uc.h"
#include <linux/firmware.h>
+void intel_uc_sanitize_options(struct drm_i915_private *dev_priv)
+{
+ if (!HAS_GUC(dev_priv)) {
+ if (i915.enable_guc_loading > 0)
+ DRM_INFO("Ignoring GuC options, no hardware");
+
+ i915.enable_guc_loading = 0;
+ i915.enable_guc_submission = 0;
+ } else {
+ /* A negative value means "use platform default" */
+ if (i915.enable_guc_loading < 0)
+ i915.enable_guc_loading = HAS_GUC_UCODE(dev_priv);
+ if (i915.enable_guc_submission < 0)
+ i915.enable_guc_submission = HAS_GUC_SCHED(dev_priv);
+
+ /* Can't enable guc submission without guc loaded */
+ if (!i915.enable_guc_loading)
+ i915.enable_guc_submission = 0;
+ }
+}
+
void intel_uc_init_early(struct drm_i915_private *dev_priv)
{
mutex_init(&dev_priv->guc.send_mutex);
void intel_uc_init_fw(struct drm_i915_private *dev_priv)
{
- intel_huc_init_fw(&dev_priv->huc);
+ if (!i915.enable_guc_loading)
+ return;
+
+ if (HAS_HUC_UCODE(dev_priv))
+ intel_huc_init_fw(&dev_priv->huc);
+
intel_guc_init_fw(&dev_priv->guc);
}
};
/* intel_uc.c */
+void intel_uc_sanitize_options(struct drm_i915_private *dev_priv);
void intel_uc_init_early(struct drm_i915_private *dev_priv);
void intel_uc_init_fw(struct drm_i915_private *dev_priv);
void intel_uc_prepare_fw(struct drm_i915_private *dev_priv,