drm/amdgpu: enable sw clock gating for vcn

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
index 15a2c0f10a2a315d90353df9b12baddb325d1afb..61a25a16699db8d708b1f7e6a535e1d09cfaecc6 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
@@ -501,7 +501,7 @@ static int vcn_v1_0_start(struct amdgpu_device *adev)
        vcn_v1_0_mc_resume(adev);
 
        /* disable clock gating */
-       vcn_v1_0_disable_clock_gating(adev, false);
+       vcn_v1_0_disable_clock_gating(adev, true);
 
        /* disable interupt */
        WREG32_P(SOC15_REG_OFFSET(UVD, 0, mmUVD_MASTINT_EN), 0,
@@ -682,7 +682,7 @@ static int vcn_v1_0_stop(struct amdgpu_device *adev)
                        ~UVD_LMI_CTRL2__STALL_ARB_UMC_MASK);
 
        /* enable clock gating */
-       vcn_v1_0_enable_clock_gating(adev, false);
+       vcn_v1_0_enable_clock_gating(adev, true);
 
        return 0;
 }