Some of the newer 4xx pci cores need an explicit bit set to send
type 1 transactions instead of just comparing the bus numbers.
This patch enables type 1 transations for pcix nodes, thus enabling
devices behind PCI bridges.
Signed-off-by: Stef van Os <stef.van.os@gmail.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
hose->last_busno = bus_range ? bus_range[1] : 0xff;
/* Setup config space */
- setup_indirect_pci(hose, rsrc_cfg.start, rsrc_cfg.start + 0x4, 0);
+ setup_indirect_pci(hose, rsrc_cfg.start, rsrc_cfg.start + 0x4,
+ PPC_INDIRECT_TYPE_SET_CFG_TYPE);
/* Disable all windows */
writel(0, reg + PCIX0_POM0SA);