drm/gma500: Make all chips use gma_wait_for_vblank
authorPatrik Jakobsson <patrik.r.jakobsson@gmail.com>
Tue, 9 Jul 2013 23:20:19 +0000 (01:20 +0200)
committerPatrik Jakobsson <patrik.r.jakobsson@gmail.com>
Tue, 23 Jul 2013 23:47:20 +0000 (01:47 +0200)
Also remove the duplicated oaktrail function.

Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
drivers/gpu/drm/gma500/cdv_intel_dp.c
drivers/gpu/drm/gma500/mdfld_intel_display.c
drivers/gpu/drm/gma500/oaktrail_crtc.c
drivers/gpu/drm/gma500/oaktrail_hdmi.c
drivers/gpu/drm/gma500/psb_intel_display.c
drivers/gpu/drm/gma500/psb_intel_drv.h
drivers/gpu/drm/gma500/psb_intel_sdvo.c

index 88d9ef6b5b4a20f2d2d6dfaa3e3621008db09cd3..839ab83ff6ec2065b4593149dfeb337470d19dd2 100644 (file)
@@ -34,6 +34,7 @@
 #include "psb_drv.h"
 #include "psb_intel_drv.h"
 #include "psb_intel_reg.h"
+#include "gma_display.h"
 #include <drm/drm_dp_helper.h>
 
 #define _wait_for(COND, MS, W) ({ \
@@ -1317,7 +1318,7 @@ cdv_intel_dp_start_link_train(struct psb_intel_encoder *encoder)
        /* Enable output, wait for it to become active */
        REG_WRITE(intel_dp->output_reg, reg);
        REG_READ(intel_dp->output_reg);
-       psb_intel_wait_for_vblank(dev);
+       gma_wait_for_vblank(dev);
 
        DRM_DEBUG_KMS("Link config\n");
        /* Write the link configuration data */
index aa6528dae0721d3412c33936780806fc414ccbd8..da83fddbc9a8c69b3383e531a8fceaf55f80d0fe 100644 (file)
@@ -65,7 +65,7 @@ void mdfldWaitForPipeDisable(struct drm_device *dev, int pipe)
        }
 
        /* FIXME JLIU7_PO */
-       psb_intel_wait_for_vblank(dev);
+       gma_wait_for_vblank(dev);
        return;
 
        /* Wait for for the pipe disable to take effect. */
@@ -93,7 +93,7 @@ void mdfldWaitForPipeEnable(struct drm_device *dev, int pipe)
        }
 
        /* FIXME JLIU7_PO */
-       psb_intel_wait_for_vblank(dev);
+       gma_wait_for_vblank(dev);
        return;
 
        /* Wait for for the pipe enable to take effect. */
@@ -1034,7 +1034,7 @@ static int mdfld_crtc_mode_set(struct drm_crtc *crtc,
 
        /* Wait for for the pipe enable to take effect. */
        REG_WRITE(map->cntr, dev_priv->dspcntr[pipe]);
-       psb_intel_wait_for_vblank(dev);
+       gma_wait_for_vblank(dev);
 
 mrst_crtc_mode_set_exit:
 
index 75567ee8a5192971cff927989f7f3f307c59a53e..8af461f3a72d6e514b59d66a30ac3436e314a323 100644 (file)
@@ -242,7 +242,7 @@ static void oaktrail_crtc_dpms(struct drm_crtc *crtc, int mode)
                        REG_READ(map->conf);
                }
                /* Wait for for the pipe disable to take effect. */
-               psb_intel_wait_for_vblank(dev);
+               gma_wait_for_vblank(dev);
 
                temp = REG_READ(map->dpll);
                if ((temp & DPLL_VCO_ENABLE) != 0) {
@@ -484,10 +484,10 @@ static int oaktrail_crtc_mode_set(struct drm_crtc *crtc,
 
        REG_WRITE(map->conf, pipeconf);
        REG_READ(map->conf);
-       psb_intel_wait_for_vblank(dev);
+       gma_wait_for_vblank(dev);
 
        REG_WRITE(map->cntr, dspcntr);
-       psb_intel_wait_for_vblank(dev);
+       gma_wait_for_vblank(dev);
 
 oaktrail_crtc_mode_set_exit:
        gma_power_end(dev);
index f036f1fc161e435bf7841fd5b14118f78230f0b6..d9013f70b0193493c2aadc613d330dd987fff4c3 100644 (file)
@@ -155,12 +155,6 @@ static void oaktrail_hdmi_audio_disable(struct drm_device *dev)
        HDMI_READ(HDMI_HCR);
 }
 
-static void wait_for_vblank(struct drm_device *dev)
-{
-       /* Wait for 20ms, i.e. one cycle at 50hz. */
-       mdelay(20);
-}
-
 static unsigned int htotal_calculate(struct drm_display_mode *mode)
 {
        u32 htotal, new_crtc_htotal;
@@ -372,10 +366,10 @@ int oaktrail_crtc_hdmi_mode_set(struct drm_crtc *crtc,
 
        REG_WRITE(PCH_PIPEBCONF, pipeconf);
        REG_READ(PCH_PIPEBCONF);
-       wait_for_vblank(dev);
+       gma_wait_for_vblank(dev);
 
        REG_WRITE(dspcntr_reg, dspcntr);
-       wait_for_vblank(dev);
+       gma_wait_for_vblank(dev);
 
        gma_power_end(dev);
 
@@ -459,7 +453,7 @@ void oaktrail_crtc_hdmi_dpms(struct drm_crtc *crtc, int mode)
                        REG_READ(PCH_PIPEBCONF);
                }
 
-               wait_for_vblank(dev);
+               gma_wait_for_vblank(dev);
 
                /* Enable plane */
                temp = REG_READ(DSPBCNTR);
index 89be7a3632ef5b63ab8da39459d8a45df80f1cd7..fa57864f210d0d590a006c974fc8fe7c22e41017 100644 (file)
@@ -82,12 +82,6 @@ static void psb_intel_clock(int refclk, struct gma_clock_t *clock)
        clock->dot = clock->vco / clock->p;
 }
 
-void psb_intel_wait_for_vblank(struct drm_device *dev)
-{
-       /* Wait for 20ms, i.e. one cycle at 50hz. */
-       mdelay(20);
-}
-
 static int psb_intel_pipe_set_base(struct drm_crtc *crtc,
                            int x, int y, struct drm_framebuffer *old_fb)
 {
@@ -244,7 +238,7 @@ static void psb_intel_crtc_dpms(struct drm_crtc *crtc, int mode)
                }
 
                /* Wait for vblank for the disable to take effect. */
-               psb_intel_wait_for_vblank(dev);
+               gma_wait_for_vblank(dev);
 
                temp = REG_READ(map->dpll);
                if ((temp & DPLL_VCO_ENABLE) != 0) {
@@ -516,14 +510,14 @@ static int psb_intel_crtc_mode_set(struct drm_crtc *crtc,
        REG_WRITE(map->conf, pipeconf);
        REG_READ(map->conf);
 
-       psb_intel_wait_for_vblank(dev);
+       gma_wait_for_vblank(dev);
 
        REG_WRITE(map->cntr, dspcntr);
 
        /* Flush the plane changes */
        crtc_funcs->mode_set_base(crtc, x, y, old_fb);
 
-       psb_intel_wait_for_vblank(dev);
+       gma_wait_for_vblank(dev);
 
        return 0;
 }
@@ -669,12 +663,12 @@ static void psb_intel_crtc_restore(struct drm_crtc *crtc)
        REG_WRITE(map->base, crtc_state->saveDSPBASE);
        REG_WRITE(map->conf, crtc_state->savePIPECONF);
 
-       psb_intel_wait_for_vblank(dev);
+       gma_wait_for_vblank(dev);
 
        REG_WRITE(map->cntr, crtc_state->saveDSPCNTR);
        REG_WRITE(map->base, crtc_state->saveDSPBASE);
 
-       psb_intel_wait_for_vblank(dev);
+       gma_wait_for_vblank(dev);
 
        paletteReg = map->palette;
        for (i = 0; i < 256; ++i)
index bfe0408c129116e32bc77d25a48d34743a92e4bf..596850210a513272449f747aa91483f770fdc262 100644 (file)
@@ -246,7 +246,6 @@ extern struct drm_encoder *psb_intel_best_encoder(struct drm_connector
 
 extern struct drm_display_mode *psb_intel_crtc_mode_get(struct drm_device *dev,
                                                    struct drm_crtc *crtc);
-extern void psb_intel_wait_for_vblank(struct drm_device *dev);
 extern int psb_intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data,
                                struct drm_file *file_priv);
 extern struct drm_crtc *psb_intel_get_crtc_from_pipe(struct drm_device *dev,
index 19e36603b23b64e2c500cb425d3bf0246b2fdd8f..e3d1078ecf09e7de0ddcdcdb5922bf8913f78421 100644 (file)
@@ -1121,7 +1121,7 @@ static void psb_intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
                if ((temp & SDVO_ENABLE) == 0)
                        psb_intel_sdvo_write_sdvox(psb_intel_sdvo, temp | SDVO_ENABLE);
                for (i = 0; i < 2; i++)
-                       psb_intel_wait_for_vblank(dev);
+                       gma_wait_for_vblank(dev);
 
                status = psb_intel_sdvo_get_trained_inputs(psb_intel_sdvo, &input1, &input2);
                /* Warn if the device reported failure to sync.