AIF1ADC TDM mode has no effect other than causing the ADCDAT line to
be tristated rather than driven low on clock cycles where there is no
data to be transmitted. If the clock cycle is idle then there should
be no devices using the data so tristating should have no adverse
effects.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
1 << WM8994_AIF2DAC_3D_GAIN_SHIFT,
1 << WM8994_AIF2DAC_3D_GAIN_SHIFT);
+ /* Unconditionally enable AIF1 ADC TDM mode; it only affects
+ * behaviour on idle TDM clock cycles. */
+ snd_soc_update_bits(codec, WM8994_AIF1_CONTROL_1,
+ WM8994_AIF1ADC_TDM, WM8994_AIF1ADC_TDM);
+
wm8994_update_class_w(codec);
ret = snd_soc_register_codec(codec);