drm/i915/gvt: handle fence reg access during GPU reset
authorZhao, Xinda <xinda.zhao@intel.com>
Fri, 17 Feb 2017 06:38:33 +0000 (14:38 +0800)
committerZhenyu Wang <zhenyuw@linux.intel.com>
Fri, 17 Feb 2017 08:36:31 +0000 (16:36 +0800)
Lots of reduntant log info will be printed out during GPU reset,
including accessing untracked mmio register and fence register,
variable disable_warn_untrack is added previously to handle the
situation, but the accessing of fence register is ignored in the
previously patch, so add it back.

Besides, set the variable disable_warn_untrack to the defalut value
after GPU reset is finished.

Signed-off-by: Zhao, Xinda <xinda.zhao@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
drivers/gpu/drm/i915/gvt/handlers.c
drivers/gpu/drm/i915/gvt/mmio.c

index 6f098bb110bda3f47c43af830a8d9291d0ea8709..fd7e789a72c3177fa32aaa42a2fe7b18571f0de9 100644 (file)
@@ -173,16 +173,19 @@ static int sanitize_fence_mmio_access(struct intel_vgpu *vgpu,
                 * pv_info first, we treat guest not supporting GVT,
                 * and we will let vgpu enter failsafe mode.
                 */
-               if (!vgpu->pv_notified) {
+               if (!vgpu->pv_notified)
                        enter_failsafe_mode(vgpu,
                                        GVT_FAILSAFE_UNSUPPORTED_GUEST);
-                       return -EINVAL;
+
+               if (!vgpu->mmio.disable_warn_untrack) {
+                       gvt_err("vgpu%d: found oob fence register access\n",
+                                       vgpu->id);
+                       gvt_err("vgpu%d: total fence %d, access fence %d\n",
+                                       vgpu->id, vgpu_fence_sz(vgpu),
+                                       fence_num);
                }
-               gvt_err("vgpu%d: found oob fence register access\n",
-                               vgpu->id);
-               gvt_err("vgpu%d: total fence num %d access fence num %d\n",
-                               vgpu->id, vgpu_fence_sz(vgpu), fence_num);
                memset(p_data, 0, bytes);
+               return -EINVAL;
        }
        return 0;
 }
index b2d72dad153715ed22fa8b3cbcb334d9fec57798..99abb01fa9eb61d0e1cb4c4934e379772ad89430 100644 (file)
@@ -384,6 +384,8 @@ void intel_vgpu_reset_mmio(struct intel_vgpu *vgpu)
 
        /* set the bit 0:2(Core C-State ) to C0 */
        vgpu_vreg(vgpu, GEN6_GT_CORE_STATUS) = 0;
+
+       vgpu->mmio.disable_warn_untrack = false;
 }
 
 /**