Blackfin arch: Move write to VR_CTL closer to IDLE
authorMichael Hennerich <michael.hennerich@analog.com>
Mon, 21 May 2007 10:09:16 +0000 (18:09 +0800)
committerLinus Torvalds <torvalds@woody.linux-foundation.org>
Mon, 21 May 2007 16:50:21 +0000 (09:50 -0700)
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
include/asm-blackfin/mach-bf533/cdefBF532.h
include/asm-blackfin/mach-bf537/cdefBF534.h
include/asm-blackfin/mach-bf561/cdefBF561.h

index 1d7c494ceb646083a49e354d8fe9f9fc2981e910..521bdb4d297dce0ccbdaf74a8f4f5d2be36aab0b 100644 (file)
@@ -63,12 +63,14 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
 {
        unsigned long flags, iwr;
 
-       bfin_write16(VR_CTL, val);
-       __builtin_bfin_ssync();
        /* Enable the PLL Wakeup bit in SIC IWR */
        iwr = bfin_read32(SIC_IWR);
        /* Only allow PPL Wakeup) */
        bfin_write32(SIC_IWR, IWR_ENABLE(0));
+
+       bfin_write16(VR_CTL, val);
+       __builtin_bfin_ssync();
+
        local_irq_save(flags);
        asm("IDLE;");
        local_irq_restore(flags);
index 7b658c175f85e0822d29a0187af7ec0f0861bb9c..9a167f3b224ecb50461e076fc82d581c35634c09 100644 (file)
@@ -51,12 +51,14 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
 {
        unsigned long flags, iwr;
 
-       bfin_write16(VR_CTL, val);
-       __builtin_bfin_ssync();
        /* Enable the PLL Wakeup bit in SIC IWR */
        iwr = bfin_read32(SIC_IWR);
        /* Only allow PPL Wakeup) */
        bfin_write32(SIC_IWR, IWR_ENABLE(0));
+
+       bfin_write16(VR_CTL, val);
+       __builtin_bfin_ssync();
+
        local_irq_save(flags);
        asm("IDLE;");
        local_irq_restore(flags);
index 5dc0ed8354474a7e0230462b97f4353854200522..b14f872e5703cb781dd74e28bf761c094603eac1 100644 (file)
@@ -59,12 +59,14 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
 {
        unsigned long flags, iwr;
 
-       bfin_write16(VR_CTL, val);
-       __builtin_bfin_ssync();
        /* Enable the PLL Wakeup bit in SIC IWR */
        iwr = bfin_read32(SICA_IWR0);
        /* Only allow PPL Wakeup) */
        bfin_write32(SICA_IWR0, IWR_ENABLE(0));
+
+       bfin_write16(VR_CTL, val);
+       __builtin_bfin_ssync();
+
        local_irq_save(flags);
        asm("IDLE;");
        local_irq_restore(flags);