ARM: dts: imx6ul-[geam|isiot]: Add sai2 node
authorJagan Teki <jagan@amarulasolutions.com>
Fri, 24 Mar 2017 16:18:41 +0000 (21:48 +0530)
committerShawn Guo <shawnguo@kernel.org>
Mon, 10 Apr 2017 08:16:17 +0000 (16:16 +0800)
Add Synchronous Audio Interface(SAI) node for Engicam GEAM6UL
and Is.IoT MX6UL variant module boards.

Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm/boot/dts/imx6ul-geam.dtsi
arch/arm/boot/dts/imx6ul-isiot.dtsi

index ee5220c3ba7a51b945e8fc3bd895913e2c5a5ea2..eb94d956808bb21d05d190d11a6a652bb9f84ff9 100644 (file)
        xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>;
 };
 
+&sai2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_sai2>;
+       status = "okay";
+};
+
 &uart1 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_uart1>;
                >;
        };
 
+       pinctrl_sai2: sai2grp {
+               fsl,pins = <
+                       MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA        0x130b0
+                       MX6UL_PAD_JTAG_TMS__CCM_CLKO1           0x4001b031
+                       MX6UL_PAD_JTAG_TDI__SAI2_TX_BCLK        0x17088
+                       MX6UL_PAD_JTAG_TDO__SAI2_TX_SYNC        0x17088
+                       MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA     0x120b0
+               >;
+       };
+
        pinctrl_uart1: uart1grp {
                fsl,pins = <
                        MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
index 4697a04464e9b7e02867463f1f84abf86d333792..ea30380ad7a4bef0e1261bdc7788b9257579b2ec 100644 (file)
        status = "okay";
 };
 
+&sai2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_sai2>;
+       status = "okay";
+};
+
 &uart1 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_uart1>;
                >;
        };
 
+       pinctrl_sai2: sai2grp {
+               fsl,pins = <
+                       MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA        0x130b0
+                       MX6UL_PAD_JTAG_TMS__CCM_CLKO1           0x4001b031
+                       MX6UL_PAD_JTAG_TDI__SAI2_TX_BCLK        0x17088
+                       MX6UL_PAD_JTAG_TDO__SAI2_TX_SYNC        0x17088
+                       MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA     0x120b0
+               >;
+       };
+
        pinctrl_uart1: uart1grp {
                fsl,pins = <
                        MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1