mmc: sdhci: add quirk SDHCI_QUIRK_CLOCK_DIV_ZERO_BROKEN
authorSuneel Garapati <suneel.garapati@xilinx.com>
Tue, 9 Jun 2015 07:31:50 +0000 (13:01 +0530)
committerUlf Hansson <ulf.hansson@linaro.org>
Mon, 17 Aug 2015 09:32:41 +0000 (11:32 +0200)
adds quirk for controllers whose clock divider zero is broken,
sdhci_set_clock function will incorporate this modification.

Signed-off-by: Suneel Garapati <suneel.garapati@xilinx.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
drivers/mmc/host/sdhci.c
drivers/mmc/host/sdhci.h

index 1dbe932320309fc87f75a40cc2552ba5a784d5bd..2ae8415e59f853a89eba3b845293d490ca16af70 100644 (file)
@@ -1210,6 +1210,9 @@ void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
                        }
                        real_div = div;
                        div >>= 1;
+                       if ((host->quirks2 & SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN)
+                               && !div && host->max_clk <= 25000000)
+                               div = 1;
                }
        } else {
                /* Version 2.00 divisors must be a power of 2. */
index 5521d29368e466d0d752839e34210a452823d62f..67046ca0c1f05d8deac0ee476da60401ff88a0d9 100644 (file)
@@ -409,6 +409,8 @@ struct sdhci_host {
 #define SDHCI_QUIRK2_SUPPORT_SINGLE                    (1<<13)
 /* Controller broken with using ACMD23 */
 #define SDHCI_QUIRK2_ACMD23_BROKEN                     (1<<14)
+/* Broken Clock divider zero in controller */
+#define SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN             (1<<15)
 
        int irq;                /* Device IRQ */
        void __iomem *ioaddr;   /* Mapped address */