ARM: dts: socfpga: rename gpio nodes

Since the Synopsys GPIO IP can support multiple ports of varying widths, it
would make more sense to have the GPIO node DTS entry as this:

gpio0: gpio@ff708000{
	porta{
	};
};

Also, this is documented in the snps-dwapb-gpio.txt.

Suggested-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>

diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index 45fce2cf6fede0a11ce2aca2d1de31aa70147ecf..4472fd92685c4b84d54e9dfb0041646f709e3477 100644 (file)
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -547,7 +547,7 @@
                        status = "disabled";
                };
 
-               gpio@ff708000 {
+               gpio0: gpio@ff708000 {
                        #address-cells = <1>;
                        #size-cells = <0>;
                        compatible = "snps,dw-apb-gpio";
@@ -555,7 +555,7 @@
                        clocks = <&per_base_clk>;
                        status = "disabled";
 
-                       gpio0: gpio-controller@0 {
+                       porta: gpio-controller@0 {
                                compatible = "snps,dw-apb-gpio-port";
                                gpio-controller;
                                #gpio-cells = <2>;
@@ -567,7 +567,7 @@
                        };
                };
 
-               gpio@ff709000 {
+               gpio1: gpio@ff709000 {
                        #address-cells = <1>;
                        #size-cells = <0>;
                        compatible = "snps,dw-apb-gpio";
@@ -575,7 +575,7 @@
                        clocks = <&per_base_clk>;
                        status = "disabled";
 
-                       gpio1: gpio-controller@0 {
+                       portb: gpio-controller@0 {
                                compatible = "snps,dw-apb-gpio-port";
                                gpio-controller;
                                #gpio-cells = <2>;
@@ -587,7 +587,7 @@
                        };
                };
 
-               gpio@ff70a000 {
+               gpio2: gpio@ff70a000 {
                        #address-cells = <1>;
                        #size-cells = <0>;
                        compatible = "snps,dw-apb-gpio";
@@ -595,7 +595,7 @@
                        clocks = <&per_base_clk>;
                        status = "disabled";
 
-                       gpio2: gpio-controller@0 {
+                       portc: gpio-controller@0 {
                                compatible = "snps,dw-apb-gpio-port";
                                gpio-controller;
                                #gpio-cells = <2>;