ARM: mvebu: use macros for interrupt flags on Armada 375/38x
authorThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Thu, 20 Feb 2014 11:11:31 +0000 (12:11 +0100)
committerJason Cooper <jason@lakedaemon.net>
Sat, 22 Feb 2014 04:11:03 +0000 (04:11 +0000)
Instead of hardcoding the values of the interrupt flags, use the
macros provided by <include/dt-bindings/interrupt-controller/irq.h>
and <include/dt-bindings/interrupt-controller/arm-gic.h> for the
Armada 375 and Armada 38x Device Tree files.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
arch/arm/boot/dts/armada-375.dtsi
arch/arm/boot/dts/armada-380.dtsi
arch/arm/boot/dts/armada-385.dtsi
arch/arm/boot/dts/armada-38x.dtsi

index 23d497f3f3bc785888d235eea3a5377087c91540..3877693fb2d875ef0249a67aa748f00e557f32f3 100644 (file)
@@ -13,6 +13,7 @@
 
 #include "skeleton.dtsi"
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/interrupt-controller/irq.h>
 
 #define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
 
                        timer@c600 {
                                compatible = "arm,cortex-a9-twd-timer";
                                reg = <0xc600 0x20>;
-                               interrupts = <GIC_PPI 13 0x301>;
+                               interrupts = <GIC_PPI 13 (IRQ_TYPE_EDGE_RISING | GIC_CPU_MASK_SIMPLE(2))>;
                                clocks = <&coreclk 2>;
                        };
 
                                #address-cells = <1>;
                                #size-cells = <0>;
                                cell-index = <0>;
-                               interrupts = <GIC_SPI 1 0x4>;
+                               interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&coreclk 0>;
                                status = "disabled";
                        };
                                #address-cells = <1>;
                                #size-cells = <0>;
                                cell-index = <1>;
-                               interrupts = <GIC_SPI 63 0x4>;
+                               interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&coreclk 0>;
                                status = "disabled";
                        };
                                reg = <0x11000 0x20>;
                                #address-cells = <1>;
                                #size-cells = <0>;
-                               interrupts = <GIC_SPI 2 0x4>;
+                               interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
                                timeout-ms = <1000>;
                                clocks = <&coreclk 0>;
                                status = "disabled";
                                reg = <0x11100 0x20>;
                                #address-cells = <1>;
                                #size-cells = <0>;
-                               interrupts = <GIC_SPI 3 0x4>;
+                               interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
                                timeout-ms = <1000>;
                                clocks = <&coreclk 0>;
                                status = "disabled";
                                compatible = "snps,dw-apb-uart";
                                reg = <0x12000 0x100>;
                                reg-shift = <2>;
-                               interrupts = <GIC_SPI 12 4>;
+                               interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
                                reg-io-width = <1>;
                                status = "disabled";
                        };
                                compatible = "snps,dw-apb-uart";
                                reg = <0x12100 0x100>;
                                reg-shift = <2>;
-                               interrupts = <GIC_SPI 13 4>;
+                               interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
                                reg-io-width = <1>;
                                status = "disabled";
                        };
                                #gpio-cells = <2>;
                                interrupt-controller;
                                #interrupt-cells = <2>;
-                               interrupts = <GIC_SPI 53 0x4>, <GIC_SPI 54 0x4>,
-                                            <GIC_SPI 55 0x4>, <GIC_SPI 56 0x4>;
+                               interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
+                                            <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
+                                            <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
+                                            <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
                        };
 
                        gpio1: gpio@18140 {
                                #gpio-cells = <2>;
                                interrupt-controller;
                                #interrupt-cells = <2>;
-                               interrupts = <GIC_SPI 58 0x4>, <GIC_SPI 59 0x4>,
-                                            <GIC_SPI 60 0x4>, <GIC_SPI 61 0x4>;
+                               interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
+                                            <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
+                                            <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
+                                            <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
                        };
 
                        gpio2: gpio@18180 {
                                #gpio-cells = <2>;
                                interrupt-controller;
                                #interrupt-cells = <2>;
-                               interrupts = <GIC_SPI 62 0x4>;
+                               interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
                        };
 
                        system-controller@18200 {
                                #size-cells = <1>;
                                interrupt-controller;
                                msi-controller;
-                               interrupts = <GIC_PPI 15 0x4>;
+                               interrupts = <GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH>;
                        };
 
                        timer@20300 {
                                compatible = "marvell,armada-375-timer", "marvell,armada-370-timer";
                                reg = <0x20300 0x30>, <0x21040 0x30>;
-                               interrupts-extended = <&gic  GIC_SPI  8 4>,
-                                                     <&gic  GIC_SPI  9 4>,
-                                                     <&gic  GIC_SPI 10 4>,
-                                                     <&gic  GIC_SPI 11 4>,
+                               interrupts-extended = <&gic  GIC_SPI  8 IRQ_TYPE_LEVEL_HIGH>,
+                                                     <&gic  GIC_SPI  9 IRQ_TYPE_LEVEL_HIGH>,
+                                                     <&gic  GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
+                                                     <&gic  GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
                                                      <&mpic 5>,
                                                      <&mpic 6>;
                                clocks = <&coreclk 0>;
                                status = "okay";
 
                                xor00 {
-                                       interrupts = <GIC_SPI 22 0x4>;
+                                       interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
                                        dmacap,memcpy;
                                        dmacap,xor;
                                };
                                xor01 {
-                                       interrupts = <GIC_SPI 23 0x4>;
+                                       interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
                                        dmacap,memcpy;
                                        dmacap,xor;
                                        dmacap,memset;
                                status = "okay";
 
                                xor10 {
-                                       interrupts = <GIC_SPI 65 0x4>;
+                                       interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
                                        dmacap,memcpy;
                                        dmacap,xor;
                                };
                                xor11 {
-                                       interrupts = <GIC_SPI 66 0x4>;
+                                       interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
                                        dmacap,memcpy;
                                        dmacap,xor;
                                        dmacap,memset;
                        sata@a0000 {
                                compatible = "marvell,orion-sata";
                                reg = <0xa0000 0x5000>;
-                               interrupts = <GIC_SPI 26 0x4>;
+                               interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&gateclk 14>, <&gateclk 20>;
                                clock-names = "0", "1";
                                status = "disabled";
                                reg = <0xd0000 0x54>;
                                #address-cells = <1>;
                                #size-cells = <1>;
-                               interrupts = <GIC_SPI 84 0x4>;
+                               interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&gateclk 11>;
                                status = "disabled";
                        };
                        mvsdio@d4000 {
                                compatible = "marvell,orion-sdio";
                                reg = <0xd4000 0x200>;
-                               interrupts = <GIC_SPI 25 0x4>;
+                               interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&gateclk 17>;
                                bus-width = <4>;
                                cap-sdio-irq;
                                ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
                                          0x81000000 0 0 0x81000000 0x1 0 1 0>;
                                interrupt-map-mask = <0 0 0 0>;
-                               interrupt-map = <0 0 0 0 &gic GIC_SPI 29 0x4>;
+                               interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
                                marvell,pcie-port = <0>;
                                marvell,pcie-lane = <0>;
                                clocks = <&gateclk 5>;
                                ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
                                          0x81000000 0 0 0x81000000 0x2 0 1 0>;
                                interrupt-map-mask = <0 0 0 0>;
-                               interrupt-map = <0 0 0 0 &gic GIC_SPI 33 0x4>;
+                               interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
                                marvell,pcie-port = <0>;
                                marvell,pcie-lane = <1>;
                                clocks = <&gateclk 6>;
index 678ba3d0c485e6992ad6436649ab122c1c7c1613..068031f0f263ef081f590eae7ac3da0df629ab2d 100644 (file)
@@ -70,7 +70,7 @@
                                ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
                                          0x81000000 0 0 0x81000000 0x1 0 1 0>;
                                interrupt-map-mask = <0 0 0 0>;
-                               interrupt-map = <0 0 0 0 &gic GIC_SPI 29 0x4>;
+                               interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
                                marvell,pcie-port = <0>;
                                marvell,pcie-lane = <0>;
                                clocks = <&gateclk 8>;
@@ -88,7 +88,7 @@
                                ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
                                          0x81000000 0 0 0x81000000 0x2 0 1 0>;
                                interrupt-map-mask = <0 0 0 0>;
-                               interrupt-map = <0 0 0 0 &gic GIC_SPI 33 0x4>;
+                               interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
                                marvell,pcie-port = <1>;
                                marvell,pcie-lane = <0>;
                                clocks = <&gateclk 5>;
                                ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0
                                          0x81000000 0 0 0x81000000 0x3 0 1 0>;
                                interrupt-map-mask = <0 0 0 0>;
-                               interrupt-map = <0 0 0 0 &gic GIC_SPI 70 0x4>;
+                               interrupt-map = <0 0 0 0 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
                                marvell,pcie-port = <2>;
                                marvell,pcie-lane = <0>;
                                clocks = <&gateclk 6>;
index 055bc2f1c05154bda5b8e279736d75d82b0b630e..e2919f02e1d47687c77477b1a9bd389a32a4134e 100644 (file)
@@ -81,7 +81,7 @@
                                ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
                                          0x81000000 0 0 0x81000000 0x1 0 1 0>;
                                interrupt-map-mask = <0 0 0 0>;
-                               interrupt-map = <0 0 0 0 &gic GIC_SPI 29 0x4>;
+                               interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
                                marvell,pcie-port = <0>;
                                marvell,pcie-lane = <0>;
                                clocks = <&gateclk 8>;
@@ -99,7 +99,7 @@
                                ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
                                          0x81000000 0 0 0x81000000 0x2 0 1 0>;
                                interrupt-map-mask = <0 0 0 0>;
-                               interrupt-map = <0 0 0 0 &gic GIC_SPI 33 0x4>;
+                               interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
                                marvell,pcie-port = <1>;
                                marvell,pcie-lane = <0>;
                                clocks = <&gateclk 5>;
                                ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0
                                          0x81000000 0 0 0x81000000 0x3 0 1 0>;
                                interrupt-map-mask = <0 0 0 0>;
-                               interrupt-map = <0 0 0 0 &gic GIC_SPI 70 0x4>;
+                               interrupt-map = <0 0 0 0 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
                                marvell,pcie-port = <2>;
                                marvell,pcie-lane = <0>;
                                clocks = <&gateclk 6>;
                                ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0
                                          0x81000000 0 0 0x81000000 0x4 0 1 0>;
                                interrupt-map-mask = <0 0 0 0>;
-                               interrupt-map = <0 0 0 0 &gic GIC_SPI 71 0x4>;
+                               interrupt-map = <0 0 0 0 &gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
                                marvell,pcie-port = <3>;
                                marvell,pcie-lane = <0>;
                                clocks = <&gateclk 7>;
index 502d21ae7b61091cf3a3dce2d8630242acc00703..812ce280b34945c3823030876f0c7656dda8fc1d 100644 (file)
@@ -14,6 +14,7 @@
 
 #include "skeleton.dtsi"
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/interrupt-controller/irq.h>
 
 #define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
 
                        timer@c600 {
                                compatible = "arm,cortex-a9-twd-timer";
                                reg = <0xc600 0x20>;
-                               interrupts = <GIC_PPI 13 0x301>;
+                               interrupts = <GIC_PPI 13 (IRQ_TYPE_EDGE_RISING | GIC_CPU_MASK_SIMPLE(2))>;
                                clocks = <&coreclk 2>;
                        };
 
                                #address-cells = <1>;
                                #size-cells = <0>;
                                cell-index = <0>;
-                               interrupts = <GIC_SPI 1 0x4>;
+                               interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&coreclk 0>;
                                status = "disabled";
                        };
                                #address-cells = <1>;
                                #size-cells = <0>;
                                cell-index = <1>;
-                               interrupts = <GIC_SPI 63 0x4>;
+                               interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&coreclk 0>;
                                status = "disabled";
                        };
                                reg = <0x11000 0x20>;
                                #address-cells = <1>;
                                #size-cells = <0>;
-                               interrupts = <GIC_SPI 2 0x4>;
+                               interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
                                timeout-ms = <1000>;
                                clocks = <&coreclk 0>;
                                status = "disabled";
                                reg = <0x11100 0x20>;
                                #address-cells = <1>;
                                #size-cells = <0>;
-                               interrupts = <GIC_SPI 3 0x4>;
+                               interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
                                timeout-ms = <1000>;
                                clocks = <&coreclk 0>;
                                status = "disabled";
                                compatible = "snps,dw-apb-uart";
                                reg = <0x12000 0x100>;
                                reg-shift = <2>;
-                               interrupts = <GIC_SPI 12 4>;
+                               interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
                                reg-io-width = <1>;
                                status = "disabled";
                        };
                                compatible = "snps,dw-apb-uart";
                                reg = <0x12100 0x100>;
                                reg-shift = <2>;
-                               interrupts = <GIC_SPI 13 4>;
+                               interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
                                reg-io-width = <1>;
                                status = "disabled";
                        };
                                #gpio-cells = <2>;
                                interrupt-controller;
                                #interrupt-cells = <2>;
-                               interrupts = <GIC_SPI 53 0x4>, <GIC_SPI 54 0x4>,
-                                            <GIC_SPI 55 0x4>, <GIC_SPI 56 0x4>;
+                               interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
+                                            <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
+                                            <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
+                                            <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
                        };
 
                        gpio1: gpio@18140 {
                                #gpio-cells = <2>;
                                interrupt-controller;
                                #interrupt-cells = <2>;
-                               interrupts = <GIC_SPI 58 0x4>, <GIC_SPI 59 0x4>,
-                                            <GIC_SPI 60 0x4>, <GIC_SPI 61 0x4>;
+                               interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
+                                            <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
+                                            <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
+                                            <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
                        };
 
                        system-controller@18200 {
                                #size-cells = <1>;
                                interrupt-controller;
                                msi-controller;
-                               interrupts = <GIC_PPI 15 0x4>;
+                               interrupts = <GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH>;
                        };
 
                        timer@20300 {
                                compatible = "marvell,armada-380-timer",
                                             "marvell,armada-xp-timer";
                                reg = <0x20300 0x30>, <0x21040 0x30>;
-                               interrupts-extended = <&gic  GIC_SPI  8 4>,
-                                                     <&gic  GIC_SPI  9 4>,
-                                                     <&gic  GIC_SPI 10 4>,
-                                                     <&gic  GIC_SPI 11 4>,
+                               interrupts-extended = <&gic  GIC_SPI  8 IRQ_TYPE_LEVEL_HIGH>,
+                                                     <&gic  GIC_SPI  9 IRQ_TYPE_LEVEL_HIGH>,
+                                                     <&gic  GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
+                                                     <&gic  GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
                                                      <&mpic 5>,
                                                      <&mpic 6>;
                                clocks = <&coreclk 2>, <&refclk>;
                                status = "okay";
 
                                xor00 {
-                                       interrupts = <GIC_SPI 22 0x4>;
+                                       interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
                                        dmacap,memcpy;
                                        dmacap,xor;
                                };
                                xor01 {
-                                       interrupts = <GIC_SPI 23 0x4>;
+                                       interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
                                        dmacap,memcpy;
                                        dmacap,xor;
                                        dmacap,memset;
                                status = "okay";
 
                                xor10 {
-                                       interrupts = <GIC_SPI 65 0x4>;
+                                       interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
                                        dmacap,memcpy;
                                        dmacap,xor;
                                };
                                xor11 {
-                                       interrupts = <GIC_SPI 66 0x4>;
+                                       interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
                                        dmacap,memcpy;
                                        dmacap,xor;
                                        dmacap,memset;