)
};
-struct s5p_mfc_buf_size_v6 mfc_buf_size_v6 = {
+struct s5p_mfc_ctx_buf_size mfc_ctx_buf_size = {
.dev_ctx = PAGE_ALIGN(0x7800), /* 30KB */
.h264_dec_ctx = PAGE_ALIGN(0x200000), /* 1.6MB */
.other_dec_ctx = PAGE_ALIGN(0x7800), /* 30KB */
.dbg_info_buf = PAGE_ALIGN(0x1000), /* 4KB for DEBUG INFO */
};
-struct s5p_mfc_buf_size buf_size_v6 = {
+struct s5p_mfc_buf_size mfc_buf_size = {
.firmware_code = PAGE_ALIGN(0x100000), /* 1MB */
.cpb_buf = PAGE_ALIGN(0x300000), /* 3MB */
- .buf = &mfc_buf_size_v6,
+ .ctx_buf = &mfc_ctx_buf_size,
};
-struct s5p_mfc_buf_align mfc_buf_align_v6 = {
- .mfc_base_align = 0,
-};
-
-
-static struct s5p_mfc_variant mfc_drvdata_v6 = {
- .buf_size = &buf_size_v6,
- .buf_align = &mfc_buf_align_v6,
+static struct s5p_mfc_variant mfc_drvdata = {
+ .buf_size = &mfc_buf_size,
.num_entities = 2,
};
static const struct of_device_id exynos_mfc_match[] = {
{
- .compatible = "samsung,mfc-v6",
- .data = &mfc_drvdata_v6,
+ .compatible = "samsung,exynos-mfc",
+ .data = &mfc_drvdata,
},
{},
};
int s5p_mfc_alloc_instance_context(struct s5p_mfc_ctx *ctx)
{
struct s5p_mfc_dev *dev;
- struct s5p_mfc_buf_size_v6 *buf_size;
+ struct s5p_mfc_ctx_buf_size *buf_size;
mfc_debug_enter();
if (!ctx) {
mfc_err_dev("no mfc device to run\n");
return -EINVAL;
}
- buf_size = dev->variant->buf_size->buf;
+ buf_size = dev->variant->buf_size->ctx_buf;
switch (ctx->codec_mode) {
case S5P_FIMV_CODEC_H264_DEC:
/* Allocation buffer of debug infor memory for FW debugging */
int s5p_mfc_alloc_dbg_info_buffer(struct s5p_mfc_dev *dev)
{
- struct s5p_mfc_buf_size_v6 *buf_size = dev->variant->buf_size->buf;
+ struct s5p_mfc_ctx_buf_size *buf_size = dev->variant->buf_size->ctx_buf;
mfc_debug(2, "Allocate a debug-info buffer.\n");
static int mfc_alloc_enc_roi_buffer(struct s5p_mfc_ctx *ctx, struct s5p_mfc_special_buf *roi_buf)
{
struct s5p_mfc_dev *dev = ctx->dev;
- struct s5p_mfc_buf_size_v6 *buf_size = dev->variant->buf_size->buf;
+ struct s5p_mfc_ctx_buf_size *buf_size = dev->variant->buf_size->ctx_buf;
roi_buf->buftype = MFCBUF_NORMAL;
roi_buf->size = buf_size->shared_buf;
/* Allocate firmware */
int s5p_mfc_alloc_firmware(struct s5p_mfc_dev *dev)
{
- unsigned int base_align;
size_t firmware_size;
- struct s5p_mfc_buf_size_v6 *buf_size;
+ struct s5p_mfc_ctx_buf_size *buf_size;
mfc_debug_enter();
return -EINVAL;
}
- buf_size = dev->variant->buf_size->buf;
- base_align = dev->variant->buf_align->mfc_base_align;
+ buf_size = dev->variant->buf_size->ctx_buf;
firmware_size = dev->variant->buf_size->firmware_code;
dev->fw.size = firmware_size + buf_size->dev_ctx;
/*
- * drivers/media/platform/exynos/mfc/s5p_mfc_cmd_v6.c
+ * drivers/media/platform/exynos/mfc/s5p_mfc_cmd.c
*
* Copyright (c) 2016 Samsung Electronics Co., Ltd.
* http://www.samsung.com/
int s5p_mfc_cmd_sys_init(struct s5p_mfc_dev *dev,
enum mfc_buf_usage_type buf_type)
{
- struct s5p_mfc_buf_size_v6 *buf_size;
+ struct s5p_mfc_ctx_buf_size *buf_size;
struct s5p_mfc_special_buf *ctx_buf;
mfc_debug_enter();
s5p_mfc_clean_dev_int_flags(dev);
- buf_size = dev->variant->buf_size->buf;
+ buf_size = dev->variant->buf_size->ctx_buf;
ctx_buf = &dev->common_ctx_buf;
#ifdef CONFIG_EXYNOS_CONTENT_PATH_PROTECTION
if (buf_type == MFCBUF_DRM)
int drm_status;
};
-struct s5p_mfc_buf_align {
- unsigned int mfc_base_align;
-};
-
-struct s5p_mfc_buf_size_v6 {
+struct s5p_mfc_ctx_buf_size {
size_t dev_ctx;
size_t h264_dec_ctx;
size_t other_dec_ctx;
struct s5p_mfc_buf_size {
size_t firmware_code;
unsigned int cpb_buf;
- void *buf;
+ void *ctx_buf;
};
struct s5p_mfc_variant {
struct s5p_mfc_buf_size *buf_size;
- struct s5p_mfc_buf_align *buf_align;
int num_entities;
};
void s5p_mfc_dbg_set_addr(struct s5p_mfc_dev *dev)
{
- struct s5p_mfc_buf_size_v6 *buf_size = dev->variant->buf_size->buf;
+ struct s5p_mfc_ctx_buf_size *buf_size = dev->variant->buf_size->ctx_buf;
memset((void *)dev->dbg_info_buf.vaddr, 0, buf_size->dbg_info_buf);
static void mfc_dump_regs(struct s5p_mfc_dev *dev)
{
int i;
- struct s5p_mfc_buf_size_v6 *buf_size = NULL;
+ struct s5p_mfc_ctx_buf_size *buf_size = NULL;
int addr[MFC_SFR_AREA_COUNT][2] = {
{ 0x0, 0x80 },
{ 0x1000, 0xCD0 },
}
if (dbg_enable) {
- buf_size = dev->variant->buf_size->buf;
+ buf_size = dev->variant->buf_size->ctx_buf;
printk("[DBG INFO dump]\n");
print_hex_dump(KERN_ERR, "", DUMP_PREFIX_ADDRESS, 32, 4, dev->dbg_info_buf.vaddr,
buf_size->dbg_info_buf, false);