drm/i915: Replace DRM_DEBUG with DRM_DEBUG_KMS in DVO output code.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>

diff --git a/drivers/gpu/drm/i915/dvo_ch7017.c b/drivers/gpu/drm/i915/dvo_ch7017.c
index 621815b531dbba427b87e1290589a7de6a94fd6b..1184c14ba87d85b4a68599cb6fb85e0488ec2972 100644 (file)
--- a/drivers/gpu/drm/i915/dvo_ch7017.c
+++ b/drivers/gpu/drm/i915/dvo_ch7017.c
@@ -249,7 +249,8 @@ static bool ch7017_init(struct intel_dvo_device *dvo,
        if (val != CH7017_DEVICE_ID_VALUE &&
            val != CH7018_DEVICE_ID_VALUE &&
            val != CH7019_DEVICE_ID_VALUE) {
-               DRM_DEBUG("ch701x not detected, got %d: from %s Slave %d.\n",
+               DRM_DEBUG_KMS("ch701x not detected, got %d: from %s "
+                               "Slave %d.\n",
                          val, i2cbus->adapter.name,dvo->slave_addr);
                goto fail;
        }
@@ -284,7 +285,7 @@ static void ch7017_mode_set(struct intel_dvo_device *dvo,
        uint8_t horizontal_active_pixel_output, vertical_active_line_output;
        uint8_t active_input_line_output;
 
-       DRM_DEBUG("Registers before mode setting\n");
+       DRM_DEBUG_KMS("Registers before mode setting\n");
        ch7017_dump_regs(dvo);
 
        /* LVDS PLL settings from page 75 of 7017-7017ds.pdf*/
@@ -346,7 +347,7 @@ static void ch7017_mode_set(struct intel_dvo_device *dvo,
        /* Turn the LVDS back on with new settings. */
        ch7017_write(dvo, CH7017_LVDS_POWER_DOWN, lvds_power_down);
 
-       DRM_DEBUG("Registers after mode setting\n");
+       DRM_DEBUG_KMS("Registers after mode setting\n");
        ch7017_dump_regs(dvo);
 }
 
@@ -386,7 +387,7 @@ static void ch7017_dump_regs(struct intel_dvo_device *dvo)
 #define DUMP(reg)                                      \
 do {                                                   \
        ch7017_read(dvo, reg, &val);                    \
-       DRM_DEBUG(#reg ": %02x\n", val);                \
+       DRM_DEBUG_KMS(#reg ": %02x\n", val);            \
 } while (0)
 
        DUMP(CH7017_HORIZONTAL_ACTIVE_PIXEL_INPUT);

diff --git a/drivers/gpu/drm/i915/dvo_ch7xxx.c b/drivers/gpu/drm/i915/dvo_ch7xxx.c
index a9b8962896801ffe674bafe06685e9e40f846036..d56ff5cc22b25cfb82959c4002b8ff03f56687c2 100644 (file)
--- a/drivers/gpu/drm/i915/dvo_ch7xxx.c
+++ b/drivers/gpu/drm/i915/dvo_ch7xxx.c
@@ -152,7 +152,7 @@ static bool ch7xxx_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch)
        };
 
        if (!ch7xxx->quiet) {
-               DRM_DEBUG("Unable to read register 0x%02x from %s:%02x.\n",
+               DRM_DEBUG_KMS("Unable to read register 0x%02x from %s:%02x.\n",
                          addr, i2cbus->adapter.name, dvo->slave_addr);
        }
        return false;
@@ -179,7 +179,7 @@ static bool ch7xxx_writeb(struct intel_dvo_device *dvo, int addr, uint8_t ch)
                return true;
 
        if (!ch7xxx->quiet) {
-               DRM_DEBUG("Unable to write register 0x%02x to %s:%d.\n",
+               DRM_DEBUG_KMS("Unable to write register 0x%02x to %s:%d.\n",
                          addr, i2cbus->adapter.name, dvo->slave_addr);
        }
 
@@ -207,7 +207,8 @@ static bool ch7xxx_init(struct intel_dvo_device *dvo,
 
        name = ch7xxx_get_id(vendor);
        if (!name) {
-               DRM_DEBUG("ch7xxx not detected; got 0x%02x from %s slave %d.\n",
+               DRM_DEBUG_KMS("ch7xxx not detected; got 0x%02x from %s "
+                               "slave %d.\n",
                          vendor, adapter->name, dvo->slave_addr);
                goto out;
        }
@@ -217,13 +218,14 @@ static bool ch7xxx_init(struct intel_dvo_device *dvo,
                goto out;
 
        if (device != CH7xxx_DID) {
-               DRM_DEBUG("ch7xxx not detected; got 0x%02x from %s slave %d.\n",
+               DRM_DEBUG_KMS("ch7xxx not detected; got 0x%02x from %s "
+                               "slave %d.\n",
                          vendor, adapter->name, dvo->slave_addr);
                goto out;
        }
 
        ch7xxx->quiet = false;
-       DRM_DEBUG("Detected %s chipset, vendor/device ID 0x%02x/0x%02x\n",
+       DRM_DEBUG_KMS("Detected %s chipset, vendor/device ID 0x%02x/0x%02x\n",
                  name, vendor, device);
        return true;
 out:
@@ -315,8 +317,8 @@ static void ch7xxx_dump_regs(struct intel_dvo_device *dvo)
 
        for (i = 0; i < CH7xxx_NUM_REGS; i++) {
                if ((i % 8) == 0 )
-                       DRM_DEBUG("\n %02X: ", i);
-               DRM_DEBUG("%02X ", ch7xxx->mode_reg.regs[i]);
+                       DRM_LOG_KMS("\n %02X: ", i);
+               DRM_LOG_KMS("%02X ", ch7xxx->mode_reg.regs[i]);
        }
 }
 

diff --git a/drivers/gpu/drm/i915/dvo_ivch.c b/drivers/gpu/drm/i915/dvo_ivch.c
index aa176f9921fe2c772ade093f67d970647b175f34..24169e528f0f56fea5fc8a9ab5d78e27579f625c 100644 (file)
--- a/drivers/gpu/drm/i915/dvo_ivch.c
+++ b/drivers/gpu/drm/i915/dvo_ivch.c
@@ -202,7 +202,8 @@ static bool ivch_read(struct intel_dvo_device *dvo, int addr, uint16_t *data)
        };
 
        if (!priv->quiet) {
-               DRM_DEBUG("Unable to read register 0x%02x from %s:%02x.\n",
+               DRM_DEBUG_KMS("Unable to read register 0x%02x from "
+                               "%s:%02x.\n",
                          addr, i2cbus->adapter.name, dvo->slave_addr);
        }
        return false;
@@ -230,7 +231,7 @@ static bool ivch_write(struct intel_dvo_device *dvo, int addr, uint16_t data)
                return true;
 
        if (!priv->quiet) {
-               DRM_DEBUG("Unable to write register 0x%02x to %s:%d.\n",
+               DRM_DEBUG_KMS("Unable to write register 0x%02x to %s:%d.\n",
                          addr, i2cbus->adapter.name, dvo->slave_addr);
        }
 
@@ -261,7 +262,7 @@ static bool ivch_init(struct intel_dvo_device *dvo,
         * the address it's responding on.
         */
        if ((temp & VR00_BASE_ADDRESS_MASK) != dvo->slave_addr) {
-               DRM_DEBUG("ivch detect failed due to address mismatch "
+               DRM_DEBUG_KMS("ivch detect failed due to address mismatch "
                          "(%d vs %d)\n",
                          (temp & VR00_BASE_ADDRESS_MASK), dvo->slave_addr);
                goto out;
@@ -367,41 +368,41 @@ static void ivch_dump_regs(struct intel_dvo_device *dvo)
        uint16_t val;
 
        ivch_read(dvo, VR00, &val);
-       DRM_DEBUG("VR00: 0x%04x\n", val);
+       DRM_LOG_KMS("VR00: 0x%04x\n", val);
        ivch_read(dvo, VR01, &val);
-       DRM_DEBUG("VR01: 0x%04x\n", val);
+       DRM_LOG_KMS("VR01: 0x%04x\n", val);
        ivch_read(dvo, VR30, &val);
-       DRM_DEBUG("VR30: 0x%04x\n", val);
+       DRM_LOG_KMS("VR30: 0x%04x\n", val);
        ivch_read(dvo, VR40, &val);
-       DRM_DEBUG("VR40: 0x%04x\n", val);
+       DRM_LOG_KMS("VR40: 0x%04x\n", val);
 
        /* GPIO registers */
        ivch_read(dvo, VR80, &val);
-       DRM_DEBUG("VR80: 0x%04x\n", val);
+       DRM_LOG_KMS("VR80: 0x%04x\n", val);
        ivch_read(dvo, VR81, &val);
-       DRM_DEBUG("VR81: 0x%04x\n", val);
+       DRM_LOG_KMS("VR81: 0x%04x\n", val);
        ivch_read(dvo, VR82, &val);
-       DRM_DEBUG("VR82: 0x%04x\n", val);
+       DRM_LOG_KMS("VR82: 0x%04x\n", val);
        ivch_read(dvo, VR83, &val);
-       DRM_DEBUG("VR83: 0x%04x\n", val);
+       DRM_LOG_KMS("VR83: 0x%04x\n", val);
        ivch_read(dvo, VR84, &val);
-       DRM_DEBUG("VR84: 0x%04x\n", val);
+       DRM_LOG_KMS("VR84: 0x%04x\n", val);
        ivch_read(dvo, VR85, &val);
-       DRM_DEBUG("VR85: 0x%04x\n", val);
+       DRM_LOG_KMS("VR85: 0x%04x\n", val);
        ivch_read(dvo, VR86, &val);
-       DRM_DEBUG("VR86: 0x%04x\n", val);
+       DRM_LOG_KMS("VR86: 0x%04x\n", val);
        ivch_read(dvo, VR87, &val);
-       DRM_DEBUG("VR87: 0x%04x\n", val);
+       DRM_LOG_KMS("VR87: 0x%04x\n", val);
        ivch_read(dvo, VR88, &val);
-       DRM_DEBUG("VR88: 0x%04x\n", val);
+       DRM_LOG_KMS("VR88: 0x%04x\n", val);
 
        /* Scratch register 0 - AIM Panel type */
        ivch_read(dvo, VR8E, &val);
-       DRM_DEBUG("VR8E: 0x%04x\n", val);
+       DRM_LOG_KMS("VR8E: 0x%04x\n", val);
 
        /* Scratch register 1 - Status register */
        ivch_read(dvo, VR8F, &val);
-       DRM_DEBUG("VR8F: 0x%04x\n", val);
+       DRM_LOG_KMS("VR8F: 0x%04x\n", val);
 }
 
 static void ivch_save(struct intel_dvo_device *dvo)

diff --git a/drivers/gpu/drm/i915/dvo_sil164.c b/drivers/gpu/drm/i915/dvo_sil164.c
index e1c1f7341e5cff60a15fb568e7a0dd322782ef91..0001c13f0a805edc55239147fb442488b51709ea 100644 (file)
--- a/drivers/gpu/drm/i915/dvo_sil164.c
+++ b/drivers/gpu/drm/i915/dvo_sil164.c
@@ -105,7 +105,7 @@ static bool sil164_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch)
        };
 
        if (!sil->quiet) {
-               DRM_DEBUG("Unable to read register 0x%02x from %s:%02x.\n",
+               DRM_DEBUG_KMS("Unable to read register 0x%02x from %s:%02x.\n",
                          addr, i2cbus->adapter.name, dvo->slave_addr);
        }
        return false;
@@ -131,7 +131,7 @@ static bool sil164_writeb(struct intel_dvo_device *dvo, int addr, uint8_t ch)
                return true;
 
        if (!sil->quiet) {
-               DRM_DEBUG("Unable to write register 0x%02x to %s:%d.\n",
+               DRM_DEBUG_KMS("Unable to write register 0x%02x to %s:%d.\n",
                          addr, i2cbus->adapter.name, dvo->slave_addr);
        }
 
@@ -158,7 +158,7 @@ static bool sil164_init(struct intel_dvo_device *dvo,
                goto out;
 
        if (ch != (SIL164_VID & 0xff)) {
-               DRM_DEBUG("sil164 not detected got %d: from %s Slave %d.\n",
+               DRM_DEBUG_KMS("sil164 not detected got %d: from %s Slave %d.\n",
                          ch, adapter->name, dvo->slave_addr);
                goto out;
        }
@@ -167,13 +167,13 @@ static bool sil164_init(struct intel_dvo_device *dvo,
                goto out;
 
        if (ch != (SIL164_DID & 0xff)) {
-               DRM_DEBUG("sil164 not detected got %d: from %s Slave %d.\n",
+               DRM_DEBUG_KMS("sil164 not detected got %d: from %s Slave %d.\n",
                          ch, adapter->name, dvo->slave_addr);
                goto out;
        }
        sil->quiet = false;
 
-       DRM_DEBUG("init sil164 dvo controller successfully!\n");
+       DRM_DEBUG_KMS("init sil164 dvo controller successfully!\n");
        return true;
 
 out:
@@ -241,15 +241,15 @@ static void sil164_dump_regs(struct intel_dvo_device *dvo)
        uint8_t val;
 
        sil164_readb(dvo, SIL164_FREQ_LO, &val);
-       DRM_DEBUG("SIL164_FREQ_LO: 0x%02x\n", val);
+       DRM_LOG_KMS("SIL164_FREQ_LO: 0x%02x\n", val);
        sil164_readb(dvo, SIL164_FREQ_HI, &val);
-       DRM_DEBUG("SIL164_FREQ_HI: 0x%02x\n", val);
+       DRM_LOG_KMS("SIL164_FREQ_HI: 0x%02x\n", val);
        sil164_readb(dvo, SIL164_REG8, &val);
-       DRM_DEBUG("SIL164_REG8: 0x%02x\n", val);
+       DRM_LOG_KMS("SIL164_REG8: 0x%02x\n", val);
        sil164_readb(dvo, SIL164_REG9, &val);
-       DRM_DEBUG("SIL164_REG9: 0x%02x\n", val);
+       DRM_LOG_KMS("SIL164_REG9: 0x%02x\n", val);
        sil164_readb(dvo, SIL164_REGC, &val);
-       DRM_DEBUG("SIL164_REGC: 0x%02x\n", val);
+       DRM_LOG_KMS("SIL164_REGC: 0x%02x\n", val);
 }
 
 static void sil164_save(struct intel_dvo_device *dvo)

diff --git a/drivers/gpu/drm/i915/dvo_tfp410.c b/drivers/gpu/drm/i915/dvo_tfp410.c
index 9ecc907384ec339d312ca31c5ea26a2a0636aedf..c7c391bc116a6a22ed830a64be2a48514e114eb9 100644 (file)
--- a/drivers/gpu/drm/i915/dvo_tfp410.c
+++ b/drivers/gpu/drm/i915/dvo_tfp410.c
@@ -130,7 +130,7 @@ static bool tfp410_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch)
        };
 
        if (!tfp->quiet) {
-               DRM_DEBUG("Unable to read register 0x%02x from %s:%02x.\n",
+               DRM_DEBUG_KMS("Unable to read register 0x%02x from %s:%02x.\n",
                          addr, i2cbus->adapter.name, dvo->slave_addr);
        }
        return false;
@@ -156,7 +156,7 @@ static bool tfp410_writeb(struct intel_dvo_device *dvo, int addr, uint8_t ch)
                return true;
 
        if (!tfp->quiet) {
-               DRM_DEBUG("Unable to write register 0x%02x to %s:%d.\n",
+               DRM_DEBUG_KMS("Unable to write register 0x%02x to %s:%d.\n",
                          addr, i2cbus->adapter.name, dvo->slave_addr);
        }
 
@@ -191,13 +191,15 @@ static bool tfp410_init(struct intel_dvo_device *dvo,
        tfp->quiet = true;
 
        if ((id = tfp410_getid(dvo, TFP410_VID_LO)) != TFP410_VID) {
-               DRM_DEBUG("tfp410 not detected got VID %X: from %s Slave %d.\n",
+               DRM_DEBUG_KMS("tfp410 not detected got VID %X: from %s "
+                               "Slave %d.\n",
                          id, adapter->name, dvo->slave_addr);
                goto out;
        }
 
        if ((id = tfp410_getid(dvo, TFP410_DID_LO)) != TFP410_DID) {
-               DRM_DEBUG("tfp410 not detected got DID %X: from %s Slave %d.\n",
+               DRM_DEBUG_KMS("tfp410 not detected got DID %X: from %s "
+                               "Slave %d.\n",
                          id, adapter->name, dvo->slave_addr);
                goto out;
        }
@@ -262,33 +264,33 @@ static void tfp410_dump_regs(struct intel_dvo_device *dvo)
        uint8_t val, val2;
 
        tfp410_readb(dvo, TFP410_REV, &val);
-       DRM_DEBUG("TFP410_REV: 0x%02X\n", val);
+       DRM_LOG_KMS("TFP410_REV: 0x%02X\n", val);
        tfp410_readb(dvo, TFP410_CTL_1, &val);
-       DRM_DEBUG("TFP410_CTL1: 0x%02X\n", val);
+       DRM_LOG_KMS("TFP410_CTL1: 0x%02X\n", val);
        tfp410_readb(dvo, TFP410_CTL_2, &val);
-       DRM_DEBUG("TFP410_CTL2: 0x%02X\n", val);
+       DRM_LOG_KMS("TFP410_CTL2: 0x%02X\n", val);
        tfp410_readb(dvo, TFP410_CTL_3, &val);
-       DRM_DEBUG("TFP410_CTL3: 0x%02X\n", val);
+       DRM_LOG_KMS("TFP410_CTL3: 0x%02X\n", val);
        tfp410_readb(dvo, TFP410_USERCFG, &val);
-       DRM_DEBUG("TFP410_USERCFG: 0x%02X\n", val);
+       DRM_LOG_KMS("TFP410_USERCFG: 0x%02X\n", val);
        tfp410_readb(dvo, TFP410_DE_DLY, &val);
-       DRM_DEBUG("TFP410_DE_DLY: 0x%02X\n", val);
+       DRM_LOG_KMS("TFP410_DE_DLY: 0x%02X\n", val);
        tfp410_readb(dvo, TFP410_DE_CTL, &val);
-       DRM_DEBUG("TFP410_DE_CTL: 0x%02X\n", val);
+       DRM_LOG_KMS("TFP410_DE_CTL: 0x%02X\n", val);
        tfp410_readb(dvo, TFP410_DE_TOP, &val);
-       DRM_DEBUG("TFP410_DE_TOP: 0x%02X\n", val);
+       DRM_LOG_KMS("TFP410_DE_TOP: 0x%02X\n", val);
        tfp410_readb(dvo, TFP410_DE_CNT_LO, &val);
        tfp410_readb(dvo, TFP410_DE_CNT_HI, &val2);
-       DRM_DEBUG("TFP410_DE_CNT: 0x%02X%02X\n", val2, val);
+       DRM_LOG_KMS("TFP410_DE_CNT: 0x%02X%02X\n", val2, val);
        tfp410_readb(dvo, TFP410_DE_LIN_LO, &val);
        tfp410_readb(dvo, TFP410_DE_LIN_HI, &val2);
-       DRM_DEBUG("TFP410_DE_LIN: 0x%02X%02X\n", val2, val);
+       DRM_LOG_KMS("TFP410_DE_LIN: 0x%02X%02X\n", val2, val);
        tfp410_readb(dvo, TFP410_H_RES_LO, &val);
        tfp410_readb(dvo, TFP410_H_RES_HI, &val2);
-       DRM_DEBUG("TFP410_H_RES: 0x%02X%02X\n", val2, val);
+       DRM_LOG_KMS("TFP410_H_RES: 0x%02X%02X\n", val2, val);
        tfp410_readb(dvo, TFP410_V_RES_LO, &val);
        tfp410_readb(dvo, TFP410_V_RES_HI, &val2);
-       DRM_DEBUG("TFP410_V_RES: 0x%02X%02X\n", val2, val);
+       DRM_LOG_KMS("TFP410_V_RES: 0x%02X%02X\n", val2, val);
 }
 
 static void tfp410_save(struct intel_dvo_device *dvo)