ASoC: mxs-saif: set a base clock rate for EXTMASTER mode work
authorDong Aisheng <dong.aisheng@linaro.org>
Fri, 20 Jul 2012 09:20:25 +0000 (17:20 +0800)
committerMark Brown <broonie@opensource.wolfsonmicro.com>
Tue, 24 Jul 2012 19:18:18 +0000 (20:18 +0100)
Set an initial clock rate for the saif internal logic to work
properly. This is important when working in EXTMASTER mode that
uses the other saif's BITCLK&LRCLK but it still needs a basic
clock which should be fast enough for the internal logic.

Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
sound/soc/mxs/mxs-saif.c

index fdbb36aa9cf54b4c633d60e2ca8502c892f7a600..b3030718c2288b9942628c9f087694b0568cbbb3 100644 (file)
@@ -427,8 +427,22 @@ static int mxs_saif_hw_params(struct snd_pcm_substream *substream,
 
        /* prepare clk in hw_param, enable in trigger */
        clk_prepare(saif->clk);
-       if (saif != master_saif)
+       if (saif != master_saif) {
+               /*
+               * Set an initial clock rate for the saif internal logic to work
+               * properly. This is important when working in EXTMASTER mode
+               * that uses the other saif's BITCLK&LRCLK but it still needs a
+               * basic clock which should be fast enough for the internal
+               * logic.
+               */
+               clk_enable(saif->clk);
+               ret = clk_set_rate(saif->clk, 24000000);
+               clk_disable(saif->clk);
+               if (ret)
+                       return ret;
+
                clk_prepare(master_saif->clk);
+       }
 
        scr = __raw_readl(saif->base + SAIF_CTRL);