drm/amd/amdgpu/cz_dpm: Remove unused variable
authorMuhammad Falak R Wani <falakreyaz@gmail.com>
Tue, 17 May 2016 09:42:44 +0000 (15:12 +0530)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 18 May 2016 13:22:07 +0000 (09:22 -0400)
Remove unused variable 'ret' from functions where it
was not used anyway, and directly return 0.

Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Muhammad Falak R Wani <falakreyaz@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/cz_dpm.c

index fa4449e126e6c811111026a13d0bac343931f7f5..933e425a81545c22d80945f08da923f964fd0d16 100644 (file)
@@ -1579,7 +1579,6 @@ static int cz_dpm_update_sclk_limit(struct amdgpu_device *adev)
 
 static int cz_dpm_set_deep_sleep_sclk_threshold(struct amdgpu_device *adev)
 {
-       int ret = 0;
        struct cz_power_info *pi = cz_get_pi(adev);
 
        if (pi->caps_sclk_ds) {
@@ -1588,20 +1587,19 @@ static int cz_dpm_set_deep_sleep_sclk_threshold(struct amdgpu_device *adev)
                                CZ_MIN_DEEP_SLEEP_SCLK);
        }
 
-       return ret;
+       return 0;
 }
 
 /* ?? without dal support, is this still needed in setpowerstate list*/
 static int cz_dpm_set_watermark_threshold(struct amdgpu_device *adev)
 {
-       int ret = 0;
        struct cz_power_info *pi = cz_get_pi(adev);
 
        cz_send_msg_to_smc_with_parameter(adev,
                        PPSMC_MSG_SetWatermarkFrequency,
                        pi->sclk_dpm.soft_max_clk);
 
-       return ret;
+       return 0;
 }
 
 static int cz_dpm_enable_nbdpm(struct amdgpu_device *adev)
@@ -1636,7 +1634,6 @@ static void cz_dpm_nbdpm_lm_pstate_enable(struct amdgpu_device *adev,
 
 static int cz_dpm_update_low_memory_pstate(struct amdgpu_device *adev)
 {
-       int ret = 0;
        struct cz_power_info *pi = cz_get_pi(adev);
        struct cz_ps *ps = &pi->requested_ps;
 
@@ -1647,21 +1644,19 @@ static int cz_dpm_update_low_memory_pstate(struct amdgpu_device *adev)
                        cz_dpm_nbdpm_lm_pstate_enable(adev, true);
        }
 
-       return ret;
+       return 0;
 }
 
 /* with dpm enabled */
 static int cz_dpm_set_power_state(struct amdgpu_device *adev)
 {
-       int ret = 0;
-
        cz_dpm_update_sclk_limit(adev);
        cz_dpm_set_deep_sleep_sclk_threshold(adev);
        cz_dpm_set_watermark_threshold(adev);
        cz_dpm_enable_nbdpm(adev);
        cz_dpm_update_low_memory_pstate(adev);
 
-       return ret;
+       return 0;
 }
 
 static void cz_dpm_post_set_power_state(struct amdgpu_device *adev)