Add register definitions used in several Exar PCI/PCIe UARTs

Add register definitions used in several Exar PCI/PCIe UARTs

Signed-off-by: Matt Schulte <matts@commtech-fastcom.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/include/uapi/linux/serial_reg.h b/include/uapi/linux/serial_reg.h
index d0b47607b90bfdc72fbc5d5dcb932052b8b8e6fd..e6322605b1380e64ed45208d6935729f0bfb9c08 100644 (file)
--- a/include/uapi/linux/serial_reg.h
+++ b/include/uapi/linux/serial_reg.h
@@ -368,10 +368,22 @@
 #define UART_OMAP_MDR1_DISABLE         0x07    /* Disable (default state) */
 
 /*
- * These are definitions for the XR17V35X and XR17D15X
+ * These are definitions for the Exar XR17V35X and XR17(C|D)15X
  */
+#define UART_EXAR_8XMODE       0x88    /* 8X sampling rate select */
 #define UART_EXAR_SLEEP                0x8b    /* Sleep mode */
 #define UART_EXAR_DVID         0x8d    /* Device identification */
 
+#define UART_EXAR_FCTR         0x08    /* Feature Control Register */
+#define UART_FCTR_EXAR_IRDA    0x08    /* IrDa data encode select */
+#define UART_FCTR_EXAR_485     0x10    /* Auto 485 half duplex dir ctl */
+#define UART_FCTR_EXAR_TRGA    0x00    /* FIFO trigger table A */
+#define UART_FCTR_EXAR_TRGB    0x60    /* FIFO trigger table B */
+#define UART_FCTR_EXAR_TRGC    0x80    /* FIFO trigger table C */
+#define UART_FCTR_EXAR_TRGD    0xc0    /* FIFO trigger table D programmable */
+
+#define UART_EXAR_TXTRG                0x0a    /* Tx FIFO trigger level write-only */
+#define UART_EXAR_RXTRG                0x0b    /* Rx FIFO trigger level write-only */
+
 #endif /* _LINUX_SERIAL_REG_H */