drm/amdgpu: move the GDS switch into vm flush as well
authorChristian König <christian.koenig@amd.com>
Tue, 1 Mar 2016 12:34:49 +0000 (13:34 +0100)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 8 Mar 2016 16:01:48 +0000 (11:01 -0500)
After all it's an operation on the VMID.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu.h
drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

index 128eba604f9782e6b164ecd0a2c1e0c30aebd4da..b6fae4b301d7aa855834bc363ab3c96289a02a12 100644 (file)
@@ -957,8 +957,10 @@ int amdgpu_vm_grab_id(struct amdgpu_vm *vm, struct amdgpu_ring *ring,
                      struct amdgpu_sync *sync, struct fence *fence,
                      unsigned *vm_id, uint64_t *vm_pd_addr);
 void amdgpu_vm_flush(struct amdgpu_ring *ring,
-                    unsigned vmid,
-                    uint64_t pd_addr);
+                    unsigned vm_id, uint64_t pd_addr,
+                    uint32_t gds_base, uint32_t gds_size,
+                    uint32_t gws_base, uint32_t gws_size,
+                    uint32_t oa_base, uint32_t oa_size);
 uint64_t amdgpu_vm_map_gart(const dma_addr_t *pages_addr, uint64_t addr);
 int amdgpu_vm_update_page_directory(struct amdgpu_device *adev,
                                    struct amdgpu_vm *vm);
index 979c445f8096bc6cb5ad07766c2b7f12c2d94cc0..e63e57e51db797c0f7026c401b3b9a3382a99e15 100644 (file)
@@ -150,13 +150,10 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
 
        if (vm) {
                /* do context switch */
-               amdgpu_vm_flush(ring, ib->vm_id, ib->vm_pd_addr);
-
-               if (ring->funcs->emit_gds_switch)
-                       amdgpu_ring_emit_gds_switch(ring, ib->vm_id,
-                                                   ib->gds_base, ib->gds_size,
-                                                   ib->gws_base, ib->gws_size,
-                                                   ib->oa_base, ib->oa_size);
+               amdgpu_vm_flush(ring, ib->vm_id, ib->vm_pd_addr,
+                               ib->gds_base, ib->gds_size,
+                               ib->gws_base, ib->gws_size,
+                               ib->oa_base, ib->oa_size);
 
                if (ring->funcs->emit_hdp_flush)
                        amdgpu_ring_emit_hdp_flush(ring);
index 364db7c45c67f2f7ac62360ce12c5321adabefec..5fab5b25b9356129bcb8a40bf4178aa4e664404c 100644 (file)
@@ -241,19 +241,27 @@ int amdgpu_vm_grab_id(struct amdgpu_vm *vm, struct amdgpu_ring *ring,
  * amdgpu_vm_flush - hardware flush the vm
  *
  * @ring: ring to use for flush
- * @vmid: vmid number to use
+ * @vm_id: vmid number to use
  * @pd_addr: address of the page directory
  *
  * Emit a VM flush when it is necessary.
  */
 void amdgpu_vm_flush(struct amdgpu_ring *ring,
-                    unsigned vmid,
-                    uint64_t pd_addr)
+                    unsigned vm_id, uint64_t pd_addr,
+                    uint32_t gds_base, uint32_t gds_size,
+                    uint32_t gws_base, uint32_t gws_size,
+                    uint32_t oa_base, uint32_t oa_size)
 {
        if (pd_addr != AMDGPU_VM_NO_FLUSH) {
-               trace_amdgpu_vm_flush(pd_addr, ring->idx, vmid);
-               amdgpu_ring_emit_vm_flush(ring, vmid, pd_addr);
+               trace_amdgpu_vm_flush(pd_addr, ring->idx, vm_id);
+               amdgpu_ring_emit_vm_flush(ring, vm_id, pd_addr);
        }
+
+       if (ring->funcs->emit_gds_switch)
+               amdgpu_ring_emit_gds_switch(ring, vm_id,
+                                           gds_base, gds_size,
+                                           gws_base, gws_size,
+                                           oa_base, oa_size);
 }
 
 /**