ARM: omap4.dtsi: add omapdss information

Add DT data for OMAP4 display subsystem, which contains the following
blocks:

dss - the wrapper/glue for the display modules
dispc - display controller
dsi - MIPI DSI encoder (two independent modules)
rfbi - MIPI DBI encoder
venc - analog TV encoder
hdmi - HDMI encoder

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>

diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index 3dfec86c1dc948c091b2a2fbc0aebe1551b5dd7d..4db99db0bffaa2a54674a94fbc0562fe2ef655a6 100644 (file)
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -817,6 +817,85 @@
 
                        status = "disabled";
                };
+
+               dss: dss@58000000 {
+                       compatible = "ti,omap4-dss";
+                       reg = <0x58000000 0x80>;
+                       status = "disabled";
+                       ti,hwmods = "dss_core";
+                       clocks = <&dss_dss_clk>;
+                       clock-names = "fck";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges;
+
+                       dispc@58001000 {
+                               compatible = "ti,omap4-dispc";
+                               reg = <0x58001000 0x1000>;
+                               interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+                               ti,hwmods = "dss_dispc";
+                               clocks = <&dss_dss_clk>;
+                               clock-names = "fck";
+                       };
+
+                       rfbi: encoder@58002000  {
+                               compatible = "ti,omap4-rfbi";
+                               reg = <0x58002000 0x1000>;
+                               status = "disabled";
+                               ti,hwmods = "dss_rfbi";
+                               clocks = <&dss_dss_clk>, <&dss_fck>;
+                               clock-names = "fck", "ick";
+                       };
+
+                       venc: encoder@58003000 {
+                               compatible = "ti,omap4-venc";
+                               reg = <0x58003000 0x1000>;
+                               status = "disabled";
+                               ti,hwmods = "dss_venc";
+                               clocks = <&dss_tv_clk>;
+                               clock-names = "fck";
+                       };
+
+                       dsi1: encoder@58004000 {
+                               compatible = "ti,omap4-dsi";
+                               reg = <0x58004000 0x200>,
+                                     <0x58004200 0x40>,
+                                     <0x58004300 0x20>;
+                               reg-names = "proto", "phy", "pll";
+                               interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
+                               status = "disabled";
+                               ti,hwmods = "dss_dsi1";
+                               clocks = <&dss_dss_clk>, <&dss_sys_clk>;
+                               clock-names = "fck", "sys_clk";
+                       };
+
+                       dsi2: encoder@58005000 {
+                               compatible = "ti,omap4-dsi";
+                               reg = <0x58005000 0x200>,
+                                     <0x58005200 0x40>,
+                                     <0x58005300 0x20>;
+                               reg-names = "proto", "phy", "pll";
+                               interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
+                               status = "disabled";
+                               ti,hwmods = "dss_dsi2";
+                               clocks = <&dss_dss_clk>, <&dss_sys_clk>;
+                               clock-names = "fck", "sys_clk";
+                       };
+
+                       hdmi: encoder@58006000 {
+                               compatible = "ti,omap4-hdmi";
+                               reg = <0x58006000 0x200>,
+                                     <0x58006200 0x100>,
+                                     <0x58006300 0x100>,
+                                     <0x58006400 0x1000>;
+                               reg-names = "wp", "pll", "phy", "core";
+                               interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
+                               status = "disabled";
+                               ti,hwmods = "dss_hdmi";
+                               clocks = <&dss_48mhz_clk>, <&dss_sys_clk>;
+                               clock-names = "fck", "sys_clk";
+                       };
+               };
        };
 };