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clk: rockchip: use rk3288 vip_out clock ids
author
Jacob Chen
<jacob-chen@iotwrt.com>
Wed, 18 Jan 2017 05:42:39 +0000
(13:42 +0800)
committer
Heiko Stuebner
<heiko@sntech.de>
Sun, 22 Jan 2017 16:08:01 +0000
(17:08 +0100)
Reference the newly added vip clock-ids in the clock-tree.
Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
drivers/clk/rockchip/clk-rk3288.c
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diff --git
a/drivers/clk/rockchip/clk-rk3288.c
b/drivers/clk/rockchip/clk-rk3288.c
index 60bff5f5295da0bf5ad68553d0f794eae1a0529a..fd98485f24df05e70c6f7586c611e6f26028d16a 100644
(file)
--- a/
drivers/clk/rockchip/clk-rk3288.c
+++ b/
drivers/clk/rockchip/clk-rk3288.c
@@
-468,7
+468,7
@@
static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
COMPOSITE_NODIV(0, "vip_src", mux_pll_src_cpll_gpll_p, 0,
RK3288_CLKSEL_CON(26), 8, 1, MFLAGS,
RK3288_CLKGATE_CON(3), 7, GFLAGS),
- COMPOSITE_NOGATE(
0
, "sclk_vip_out", mux_vip_out_p, 0,
+ COMPOSITE_NOGATE(
SCLK_VIP_OUT
, "sclk_vip_out", mux_vip_out_p, 0,
RK3288_CLKSEL_CON(26), 15, 1, MFLAGS, 9, 5, DFLAGS),
DIV(0, "pclk_pd_alive", "gpll", 0,