drm/amd/powerplay: add mask bit for fan control mode.
authorRex Zhu <Rex.Zhu@amd.com>
Wed, 2 Nov 2016 05:18:54 +0000 (13:18 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 11 Nov 2016 15:21:13 +0000 (10:21 -0500)
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
drivers/gpu/drm/amd/powerplay/inc/hwmgr.h

index e22046507e77f4b0e4b69a4c38d155fb8b67630d..db23e541a9ca7fd995f29d5a2ecbb2668535e170 100644 (file)
@@ -2000,8 +2000,9 @@ static int smu7_thermal_parameter_init(struct pp_hwmgr *hwmgr)
 
                hwmgr->dyn_state.cac_dtp_table->usTargetOperatingTemp =
                               table_info->cac_dtp_table->usTargetOperatingTemp;
-               phm_cap_set(hwmgr->platform_descriptor.platformCaps,
-                                               PHM_PlatformCaps_ODFuzzyFanControlSupport);
+               if (hwmgr->feature_mask & PP_OD_FUZZY_FAN_CONTROL_MASK)
+                       phm_cap_set(hwmgr->platform_descriptor.platformCaps,
+                                       PHM_PlatformCaps_ODFuzzyFanControlSupport);
        }
 
        return 0;
index a57410bf9f379d1f2bbf4f687647b731604d653f..6cdb7cbf515e261654f89913ef5a8a58ffab3ef3 100644 (file)
@@ -85,6 +85,7 @@ enum PP_FEATURE_MASK {
        PP_ULV_MASK = 0x100,
        PP_ENABLE_GFX_CG_THRU_SMU = 0x200,
        PP_CLOCK_STRETCH_MASK = 0x400,
+       PP_OD_FUZZY_FAN_CONTROL_MASK = 0x800
 };
 
 enum PHM_BackEnd_Magic {