tx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
if (!tx_ring)
goto err_alloc_tx;
+ /*
+ * use a memcpy to save any previously configured
+ * items like napi structs from having to be
+ * reinitialized
+ */
+ memcpy(tx_ring, tx_old, sizeof(struct e1000_ring));
rx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
if (!rx_ring)
goto err_alloc_rx;
+ memcpy(rx_ring, rx_old, sizeof(struct e1000_ring));
adapter->tx_ring = tx_ring;
adapter->rx_ring = rx_ring;
return err;
}
-static bool reg_pattern_test_array(struct e1000_adapter *adapter, u64 *data,
- int reg, int offset, u32 mask, u32 write)
+static bool reg_pattern_test(struct e1000_adapter *adapter, u64 *data,
+ int reg, int offset, u32 mask, u32 write)
{
- int i;
- u32 read;
+ u32 pat, val;
static const u32 test[] =
{0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
- for (i = 0; i < ARRAY_SIZE(test); i++) {
+ for (pat = 0; pat < ARRAY_SIZE(test); pat++) {
E1000_WRITE_REG_ARRAY(&adapter->hw, reg, offset,
- (test[i] & write));
- read = E1000_READ_REG_ARRAY(&adapter->hw, reg, offset);
- if (read != (test[i] & write & mask)) {
+ (test[pat] & write));
+ val = E1000_READ_REG_ARRAY(&adapter->hw, reg, offset);
+ if (val != (test[pat] & write & mask)) {
ndev_err(adapter->netdev, "pattern test reg %04X "
"failed: got 0x%08X expected 0x%08X\n",
reg + offset,
- read, (test[i] & write & mask));
+ val, (test[pat] & write & mask));
*data = reg;
- return true;
+ return 1;
}
}
- return false;
+ return 0;
}
static bool reg_set_and_check(struct e1000_adapter *adapter, u64 *data,
int reg, u32 mask, u32 write)
{
- u32 read;
+ u32 val;
__ew32(&adapter->hw, reg, write & mask);
- read = __er32(&adapter->hw, reg);
- if ((write & mask) != (read & mask)) {
+ val = __er32(&adapter->hw, reg);
+ if ((write & mask) != (val & mask)) {
ndev_err(adapter->netdev, "set/check reg %04X test failed: "
- "got 0x%08X expected 0x%08X\n", reg, (read & mask),
+ "got 0x%08X expected 0x%08X\n", reg, (val & mask),
(write & mask));
*data = reg;
- return true;
+ return 1;
}
- return false;
+ return 0;
}
-
-#define REG_PATTERN_TEST(R, M, W) \
- do { \
- if (reg_pattern_test_array(adapter, data, R, 0, M, W)) \
- return 1; \
+#define REG_PATTERN_TEST_ARRAY(reg, offset, mask, write) \
+ do { \
+ if (reg_pattern_test(adapter, data, reg, offset, mask, write)) \
+ return 1; \
} while (0)
+#define REG_PATTERN_TEST(reg, mask, write) \
+ REG_PATTERN_TEST_ARRAY(reg, 0, mask, write)
-#define REG_PATTERN_TEST_ARRAY(R, offset, M, W) \
- do { \
- if (reg_pattern_test_array(adapter, data, R, offset, M, W)) \
- return 1; \
- } while (0)
-
-#define REG_SET_AND_CHECK(R, M, W) \
- do { \
- if (reg_set_and_check(adapter, data, R, M, W)) \
- return 1; \
+#define REG_SET_AND_CHECK(reg, mask, write) \
+ do { \
+ if (reg_set_and_check(adapter, data, reg, mask, write)) \
+ return 1; \
} while (0)
static int e1000_reg_test(struct e1000_adapter *adapter, u64 *data)
struct pci_dev *pdev = adapter->pdev;
struct e1000_hw *hw = &adapter->hw;
u32 rctl;
- int size;
int i;
int ret_val;
if (!tx_ring->count)
tx_ring->count = E1000_DEFAULT_TXD;
- size = tx_ring->count * sizeof(struct e1000_buffer);
- tx_ring->buffer_info = kmalloc(size, GFP_KERNEL);
- if (!tx_ring->buffer_info) {
+ tx_ring->buffer_info = kcalloc(tx_ring->count,
+ sizeof(struct e1000_buffer),
+ GFP_KERNEL);
+ if (!(tx_ring->buffer_info)) {
ret_val = 1;
goto err_nomem;
}
- memset(tx_ring->buffer_info, 0, size);
tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
tx_ring->size = ALIGN(tx_ring->size, 4096);
ret_val = 2;
goto err_nomem;
}
- memset(tx_ring->desc, 0, tx_ring->size);
tx_ring->next_to_use = 0;
tx_ring->next_to_clean = 0;
- ew32(TDBAL,
- ((u64) tx_ring->dma & 0x00000000FFFFFFFF));
+ ew32(TDBAL, ((u64) tx_ring->dma & 0x00000000FFFFFFFF));
ew32(TDBAH, ((u64) tx_ring->dma >> 32));
- ew32(TDLEN,
- tx_ring->count * sizeof(struct e1000_tx_desc));
+ ew32(TDLEN, tx_ring->count * sizeof(struct e1000_tx_desc));
ew32(TDH, 0);
ew32(TDT, 0);
- ew32(TCTL,
- E1000_TCTL_PSP | E1000_TCTL_EN |
- E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT |
- E1000_COLLISION_DISTANCE << E1000_COLD_SHIFT);
+ ew32(TCTL, E1000_TCTL_PSP | E1000_TCTL_EN | E1000_TCTL_MULR |
+ E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT |
+ E1000_COLLISION_DISTANCE << E1000_COLD_SHIFT);
for (i = 0; i < tx_ring->count; i++) {
struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*tx_ring, i);
ret_val = 4;
goto err_nomem;
}
- tx_desc->buffer_addr = cpu_to_le64(
- tx_ring->buffer_info[i].dma);
+ tx_desc->buffer_addr = cpu_to_le64(tx_ring->buffer_info[i].dma);
tx_desc->lower.data = cpu_to_le32(skb->len);
tx_desc->lower.data |= cpu_to_le32(E1000_TXD_CMD_EOP |
E1000_TXD_CMD_IFCS |
- E1000_TXD_CMD_RPS);
+ E1000_TXD_CMD_RS);
tx_desc->upper.data = 0;
}
if (!rx_ring->count)
rx_ring->count = E1000_DEFAULT_RXD;
- size = rx_ring->count * sizeof(struct e1000_buffer);
- rx_ring->buffer_info = kmalloc(size, GFP_KERNEL);
- if (!rx_ring->buffer_info) {
+ rx_ring->buffer_info = kcalloc(rx_ring->count,
+ sizeof(struct e1000_buffer),
+ GFP_KERNEL);
+ if (!(rx_ring->buffer_info)) {
ret_val = 5;
goto err_nomem;
}
- memset(rx_ring->buffer_info, 0, size);
rx_ring->size = rx_ring->count * sizeof(struct e1000_rx_desc);
rx_ring->desc = dma_alloc_coherent(&pdev->dev, rx_ring->size,
ret_val = 6;
goto err_nomem;
}
- memset(rx_ring->desc, 0, rx_ring->size);
rx_ring->next_to_use = 0;
rx_ring->next_to_clean = 0;
ew32(RDH, 0);
ew32(RDT, 0);
rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 |
+ E1000_RCTL_UPE | E1000_RCTL_MPE | E1000_RCTL_LPE |
+ E1000_RCTL_SBP | E1000_RCTL_SECRC |
E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
(adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
ew32(RCTL, rctl);
ctrl_reg = er32(CTRL);
- if (hw->phy.type == e1000_phy_ife) {
+ switch (hw->phy.type) {
+ case e1000_phy_ife:
/* force 100, set loopback */
e1e_wphy(hw, PHY_CONTROL, 0x6100);
E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
E1000_CTRL_SPD_100 |/* Force Speed to 100 */
E1000_CTRL_FD); /* Force Duplex to FULL */
- } else {
+ break;
+ default:
/* force 1000, set loopback */
e1e_wphy(hw, PHY_CONTROL, 0x4140);
+ mdelay(250);
/* Now set up the MAC to the same speed/duplex as the PHY. */
ctrl_reg = er32(CTRL);
E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
E1000_CTRL_FD); /* Force Duplex to FULL */
+
+ if ((adapter->hw.mac.type == e1000_ich8lan) ||
+ (adapter->hw.mac.type == e1000_ich9lan))
+ ctrl_reg |= E1000_CTRL_SLU; /* Set Link Up */
}
if (hw->phy.media_type == e1000_media_type_copper &&
#define KMRNCTRLSTA_OPMODE (0x1F << 16)
#define KMRNCTRLSTA_OPMODE_1GB_FD_GMII 0x0582
ew32(KMRNCTRLSTA,
- (KMRNCTRLSTA_OPMODE | KMRNCTRLSTA_OPMODE_1GB_FD_GMII));
+ (KMRNCTRLSTA_OPMODE | KMRNCTRLSTA_OPMODE_1GB_FD_GMII));
return 0;
}
l = 0;
for (j = 0; j <= lc; j++) { /* loop count loop */
for (i = 0; i < 64; i++) { /* send the packets */
- e1000_create_lbtest_frame(
- tx_ring->buffer_info[i].skb, 1024);
+ e1000_create_lbtest_frame(tx_ring->buffer_info[k].skb,
+ 1024);
pci_dma_sync_single_for_device(pdev,
tx_ring->buffer_info[k].dma,
tx_ring->buffer_info[k].length,
ret_val = 13; /* ret_val is the same as mis-compare */
break;
}
- if (jiffies >= (time + 2)) {
+ if (jiffies >= (time + 20)) {
ret_val = 14; /* error code for time out error */
break;
}