drm/i915: Lift timeline ordering to await_dma_fence
authorChris Wilson <chris@chris-wilson.co.uk>
Wed, 3 May 2017 09:39:20 +0000 (10:39 +0100)
committerChris Wilson <chris@chris-wilson.co.uk>
Wed, 3 May 2017 10:08:47 +0000 (11:08 +0100)
Currently we filter out repeated use of the same timeline in the low
level i915_gem_request_await_request(), after having added the
dependency on the old request. However, we can lift this to
i915_gem_request_await_dma_fence() (before the dependency is added)
using the observation that requests along the same timeline are
explicitly ordered via i915_add_request (along with the dependencies).

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20170503093924.5320-3-chris@chris-wilson.co.uk
drivers/gpu/drm/i915/i915_gem_request.c

index b68935d056c50480c50388c76fcbd42163944f4e..022f5588d90669a834a0ef8fce93dca7200ceca7 100644 (file)
@@ -687,6 +687,7 @@ i915_gem_request_await_request(struct drm_i915_gem_request *to,
        int ret;
 
        GEM_BUG_ON(to == from);
+       GEM_BUG_ON(to->timeline == from->timeline);
 
        if (i915_gem_request_completed(from))
                return 0;
@@ -699,9 +700,6 @@ i915_gem_request_await_request(struct drm_i915_gem_request *to,
                        return ret;
        }
 
-       if (to->timeline == from->timeline)
-               return 0;
-
        if (to->engine == from->engine) {
                ret = i915_sw_fence_await_sw_fence_gfp(&to->submit,
                                                       &from->submit,
@@ -767,6 +765,14 @@ i915_gem_request_await_dma_fence(struct drm_i915_gem_request *req,
                if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags))
                        continue;
 
+               /*
+                * Requests on the same timeline are explicitly ordered, along
+                * with their dependencies, by i915_add_request() which ensures
+                * that requests are submitted in-order through each ring.
+                */
+               if (fence->context == req->fence.context)
+                       continue;
+
                if (dma_fence_is_i915(fence))
                        ret = i915_gem_request_await_request(req,
                                                             to_request(fence));