mtd: nand: pxa3xx: fix build on ARM64

In preparation to enable ARCH_MMP on ARM64, a couple of fixes are needed
to build the pxa3xx_nand driver:

Legacy DMA will only used on ARM, so also make it condtional on
CONFIG_ARM.
__raw_{read,write}sl are not available on ARM64 or generically, so use
the readsl/writesl variants instead. Somewhat inconsistently,
{read,write}sl are inherently non-swapping with the generic version
using __raw_{read,write}l.

Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: linux-mtd@lists.infradead.org
[Brian: added one more __raw_readsl -> readsl]
Signed-off-by: Brian Norris <computersforpeace@gmail.com>

diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index 6798fae625e258a4a8bca07c4cccb2b1bb7304be..1259cc558ce98954f00de813facae4bb5317ac82 100644 (file)
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -29,7 +29,7 @@
 #include <linux/of_device.h>
 #include <linux/of_mtd.h>
 
-#if defined(CONFIG_ARCH_PXA) || defined(CONFIG_ARCH_MMP)
+#if defined(CONFIG_ARM) && (defined(CONFIG_ARCH_PXA) || defined(CONFIG_ARCH_MMP))
 #define ARCH_HAS_DMA
 #endif
 
@@ -496,7 +496,7 @@ static void drain_fifo(struct pxa3xx_nand_info *info, void *data, int len)
                 * the polling on the last read.
                 */
                while (len > 8) {
-                       __raw_readsl(info->mmio_base + NDDB, data, 8);
+                       readsl(info->mmio_base + NDDB, data, 8);
 
                        ret = readl_relaxed_poll_timeout(info->mmio_base + NDSR, val,
                                                         val & NDSR_RDDREQ, 1000, 5000);
@@ -511,7 +511,7 @@ static void drain_fifo(struct pxa3xx_nand_info *info, void *data, int len)
                }
        }
 
-       __raw_readsl(info->mmio_base + NDDB, data, len);
+       readsl(info->mmio_base + NDDB, data, len);
 }
 
 static void handle_data_pio(struct pxa3xx_nand_info *info)
@@ -520,14 +520,14 @@ static void handle_data_pio(struct pxa3xx_nand_info *info)
 
        switch (info->state) {
        case STATE_PIO_WRITING:
-               __raw_writesl(info->mmio_base + NDDB,
-                             info->data_buff + info->data_buff_pos,
-                             DIV_ROUND_UP(do_bytes, 4));
+               writesl(info->mmio_base + NDDB,
+                       info->data_buff + info->data_buff_pos,
+                       DIV_ROUND_UP(do_bytes, 4));
 
                if (info->oob_size > 0)
-                       __raw_writesl(info->mmio_base + NDDB,
-                                     info->oob_buff + info->oob_buff_pos,
-                                     DIV_ROUND_UP(info->oob_size, 4));
+                       writesl(info->mmio_base + NDDB,
+                               info->oob_buff + info->oob_buff_pos,
+                               DIV_ROUND_UP(info->oob_size, 4));
                break;
        case STATE_PIO_READING:
                drain_fifo(info,
@@ -1628,8 +1628,7 @@ static int alloc_nand_resource(struct platform_device *pdev)
        info->pdev = pdev;
        info->variant = pxa3xx_nand_get_variant(pdev);
        for (cs = 0; cs < pdata->num_cs; cs++) {
-               mtd = (struct mtd_info *)((unsigned int)&info[1] +
-                     (sizeof(*mtd) + sizeof(*host)) * cs);
+               mtd = (void *)&info[1] + (sizeof(*mtd) + sizeof(*host)) * cs;
                chip = (struct nand_chip *)(&mtd[1]);
                host = (struct pxa3xx_nand_host *)chip;
                info->host[cs] = host;