/* only one clock mode per power state */
rdev->pm.requested_clock_mode_index = 0;
- DRM_INFO("Requested: e: %d m: %d p: %d\n",
- rdev->pm.power_state[rdev->pm.requested_power_state_index].
- clock_info[rdev->pm.requested_clock_mode_index].sclk,
- rdev->pm.power_state[rdev->pm.requested_power_state_index].
- clock_info[rdev->pm.requested_clock_mode_index].mclk,
- rdev->pm.power_state[rdev->pm.requested_power_state_index].
- pcie_lanes);
+ DRM_DEBUG("Requested: e: %d m: %d p: %d\n",
+ rdev->pm.power_state[rdev->pm.requested_power_state_index].
+ clock_info[rdev->pm.requested_clock_mode_index].sclk,
+ rdev->pm.power_state[rdev->pm.requested_power_state_index].
+ clock_info[rdev->pm.requested_clock_mode_index].mclk,
+ rdev->pm.power_state[rdev->pm.requested_power_state_index].
+ pcie_lanes);
}
void r100_pm_init_profile(struct radeon_device *rdev)
rdev->pm.power_state[rdev->pm.current_power_state_index].pcie_lanes)) {
radeon_set_pcie_lanes(rdev,
ps->pcie_lanes);
- DRM_INFO("Setting: p: %d\n", ps->pcie_lanes);
+ DRM_DEBUG("Setting: p: %d\n", ps->pcie_lanes);
}
}
}
}
- DRM_INFO("Requested: e: %d m: %d p: %d\n",
- rdev->pm.power_state[rdev->pm.requested_power_state_index].
- clock_info[rdev->pm.requested_clock_mode_index].sclk,
- rdev->pm.power_state[rdev->pm.requested_power_state_index].
- clock_info[rdev->pm.requested_clock_mode_index].mclk,
- rdev->pm.power_state[rdev->pm.requested_power_state_index].
- pcie_lanes);
+ DRM_DEBUG("Requested: e: %d m: %d p: %d\n",
+ rdev->pm.power_state[rdev->pm.requested_power_state_index].
+ clock_info[rdev->pm.requested_clock_mode_index].sclk,
+ rdev->pm.power_state[rdev->pm.requested_power_state_index].
+ clock_info[rdev->pm.requested_clock_mode_index].mclk,
+ rdev->pm.power_state[rdev->pm.requested_power_state_index].
+ pcie_lanes);
}
static int r600_pm_get_type_index(struct radeon_device *rdev,
if (strcmp(entry->device_class, ACPI_AC_CLASS) == 0) {
if (power_supply_is_system_supplied() > 0)
- DRM_INFO("pm: AC\n");
+ DRM_DEBUG("pm: AC\n");
else
- DRM_INFO("pm: DC\n");
+ DRM_DEBUG("pm: DC\n");
if (rdev->pm.pm_method == PM_METHOD_PROFILE) {
if (rdev->pm.profile == PM_PROFILE_AUTO) {
radeon_set_engine_clock(rdev, sclk);
radeon_pm_debug_check_in_vbl(rdev, true);
rdev->pm.current_sclk = sclk;
- DRM_INFO("Setting: e: %d\n", sclk);
+ DRM_DEBUG("Setting: e: %d\n", sclk);
}
/* set memory clock */
radeon_set_memory_clock(rdev, mclk);
radeon_pm_debug_check_in_vbl(rdev, true);
rdev->pm.current_mclk = mclk;
- DRM_INFO("Setting: m: %d\n", mclk);
+ DRM_DEBUG("Setting: m: %d\n", mclk);
}
radeon_pm_finish(rdev);
} else {
radeon_set_engine_clock(rdev, sclk);
radeon_pm_finish(rdev);
rdev->pm.current_sclk = sclk;
- DRM_INFO("Setting: e: %d\n", sclk);
+ DRM_DEBUG("Setting: e: %d\n", sclk);
}
/* set memory clock */
if (rdev->asic->set_memory_clock && (mclk != rdev->pm.current_mclk)) {
radeon_set_memory_clock(rdev, mclk);
radeon_pm_finish(rdev);
rdev->pm.current_mclk = mclk;
- DRM_INFO("Setting: m: %d\n", mclk);
+ DRM_DEBUG("Setting: m: %d\n", mclk);
}
}
rdev->pm.current_power_state_index = rdev->pm.requested_power_state_index;
rdev->pm.current_clock_mode_index = rdev->pm.requested_clock_mode_index;
} else
- DRM_INFO("pm: GUI not idle!!!\n");
+ DRM_DEBUG("pm: GUI not idle!!!\n");
}
static void radeon_pm_set_clocks(struct radeon_device *rdev)
bool in_vbl = radeon_pm_in_vbl(rdev);
if (in_vbl == false)
- DRM_INFO("not in vbl for pm change %08x at %s\n", stat_crtc,
+ DRM_DEBUG("not in vbl for pm change %08x at %s\n", stat_crtc,
finish ? "exit" : "entry");
return in_vbl;
}
rdev->pm.power_state[rdev->pm.current_power_state_index].pcie_lanes)) {
radeon_set_pcie_lanes(rdev,
ps->pcie_lanes);
- DRM_INFO("Setting: p: %d\n", ps->pcie_lanes);
+ DRM_DEBUG("Setting: p: %d\n", ps->pcie_lanes);
}
}