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drm/i915/bxt: BXT FBC enablement
author
Daisy Sun
<daisy.sun@intel.com>
Tue, 17 Mar 2015 09:39:28 +0000
(11:39 +0200)
committer
Daniel Vetter
<daniel.vetter@ffwll.ch>
Thu, 9 Apr 2015 13:57:45 +0000
(15:57 +0200)
Enable FBC feature on Broxton
Issue: VIZ-3784
Signed-off-by: Daisy Sun <daisy.sun@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Antti Koskipää <antti.koskipaa@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_drv.c
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diff --git
a/drivers/gpu/drm/i915/i915_drv.c
b/drivers/gpu/drm/i915/i915_drv.c
index 4d5078550e0b6768068ceb19ecd70f632e554664..48434cb6898d250948f01e2b0d86eb7ea2b4677d 100644
(file)
--- a/
drivers/gpu/drm/i915/i915_drv.c
+++ b/
drivers/gpu/drm/i915/i915_drv.c
@@
-388,6
+388,7
@@
static const struct intel_device_info intel_broxton_info = {
.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
.num_pipes = 3,
.has_ddi = 1,
+ .has_fbc = 1,
GEN_DEFAULT_PIPEOFFSETS,
IVB_CURSOR_OFFSETS,
};