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[PATCH] powerpc: enable CPU_FTR_CI_LARGE_PAGE for cell
authorArnd Bergmann <arnd.bergmann@de.ibm.com>
Thu, 15 Jun 2006 13:09:16 +0000 (15:09 +0200)
committerLinus Torvalds <torvalds@g5.osdl.org>
Sat, 17 Jun 2006 17:56:24 +0000 (10:56 -0700)
Reflect the fact that the Cell Broadband Engine supports 64k
pages by adding the bit to the CPU features.

Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
include/asm-powerpc/cputable.h patch | blob | blame | history

diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h
index 9fcf0162d859e3e5ec7ae95649850c305785ee04..f6265c2a0dd28f0b461f67def4621e7a4aa6f0ac 100644 (file)
--- a/include/asm-powerpc/cputable.h
+++ b/include/asm-powerpc/cputable.h
@@ -329,7 +329,7 @@ extern void do_cpu_ftr_fixups(unsigned long offset);
 #define CPU_FTRS_CELL  (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \
            CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | \
            CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \
-           CPU_FTR_CTRL | CPU_FTR_PAUSE_ZERO)
+           CPU_FTR_CTRL | CPU_FTR_PAUSE_ZERO | CPU_FTR_CI_LARGE_PAGE)
 #define CPU_FTRS_COMPATIBLE    (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \
            CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2)
 #endif