#include "../wlcore/io.h"
#include "../wlcore/acx.h"
#include "../wlcore/tx.h"
+#include "../wlcore/rx.h"
#include "../wlcore/boot.h"
#include "reg.h"
}
}
+static enum wl_rx_buf_align
+wl12xx_get_rx_buf_align(struct wl1271 *wl, u32 rx_desc)
+{
+ if (rx_desc & RX_BUF_UNALIGNED_PAYLOAD)
+ return WLCORE_RX_BUF_UNALIGNED;
+
+ return WLCORE_RX_BUF_ALIGNED;
+}
+
static bool wl12xx_mac_in_fuse(struct wl1271 *wl)
{
bool supported = false;
.calc_tx_blocks = wl12xx_calc_tx_blocks,
.set_tx_desc_blocks = wl12xx_set_tx_desc_blocks,
.set_tx_desc_data_len = wl12xx_set_tx_desc_data_len,
+ .get_rx_buf_align = wl12xx_get_rx_buf_align,
.get_pg_ver = wl12xx_get_pg_ver,
.get_mac = wl12xx_get_mac,
};
#define __WLCORE_HW_OPS_H__
#include "wlcore.h"
+#include "rx.h"
static inline u32
wlcore_hw_calc_tx_blocks(struct wl1271 *wl, u32 len, u32 spare_blks)
wl->ops->set_tx_desc_data_len(wl, desc, skb);
}
+static inline enum wl_rx_buf_align
+wlcore_hw_get_rx_buf_align(struct wl1271 *wl, u32 rx_desc)
+{
+
+ if (!wl->ops->get_rx_buf_align)
+ BUG_ON(1);
+
+ return wl->ops->get_rx_buf_align(wl, rx_desc);
+}
+
#endif
#include "rx.h"
#include "tx.h"
#include "io.h"
+#include "hw_ops.h"
/*
* TODO: this is here just for now, it must be removed when the data
return pkt_len;
}
-static bool wl12xx_rx_get_unaligned(struct wl12xx_fw_status *status,
- u32 drv_rx_counter)
-{
- /* Convert the value to bool */
- return !!(le32_to_cpu(status->rx_pkt_descs[drv_rx_counter]) &
- RX_BUF_UNALIGNED_PAYLOAD);
-}
-
static void wl1271_rx_status(struct wl1271 *wl,
struct wl1271_rx_descriptor *desc,
struct ieee80211_rx_status *status,
}
static int wl1271_rx_handle_data(struct wl1271 *wl, u8 *data, u32 length,
- bool unaligned, u8 *hlid)
+ enum wl_rx_buf_align rx_align, u8 *hlid)
{
struct wl1271_rx_descriptor *desc;
struct sk_buff *skb;
u8 *buf;
u8 beacon = 0;
u8 is_data = 0;
- u8 reserved = unaligned ? NET_IP_ALIGN : 0;
+ u8 reserved = 0;
u16 seq_num;
/*
if (unlikely(wl->plt))
return -EINVAL;
+ if (rx_align == WLCORE_RX_BUF_UNALIGNED)
+ reserved = NET_IP_ALIGN;
+
/* the data read starts with the descriptor */
desc = (struct wl1271_rx_descriptor *) data;
* payload aligned to 4 bytes.
*/
memcpy(buf, data + sizeof(*desc), length - sizeof(*desc));
+ if (rx_align == WLCORE_RX_BUF_PADDED)
+ skb_pull(skb, NET_IP_ALIGN);
+
*hlid = desc->hlid;
hdr = (struct ieee80211_hdr *)skb->data;
u32 pkt_len, align_pkt_len;
u32 pkt_offset, des;
u8 hlid;
- bool unaligned = false;
+ enum wl_rx_buf_align rx_align;
while (drv_rx_counter != fw_rx_counter) {
buf_size = 0;
while (pkt_offset < buf_size) {
des = le32_to_cpu(status->rx_pkt_descs[drv_rx_counter]);
pkt_len = wlcore_rx_get_buf_size(wl, des);
- unaligned = wl12xx_rx_get_unaligned(status,
- drv_rx_counter);
+ rx_align = wlcore_hw_get_rx_buf_align(wl, des);
/*
* the handle data call can only fail in memory-outage
*/
if (wl1271_rx_handle_data(wl,
wl->aggr_buf + pkt_offset,
- pkt_len, unaligned,
+ pkt_len, rx_align,
&hlid) == 1) {
if (hlid < WL12XX_MAX_LINKS)
__set_bit(hlid, active_hlids);
#include "wl12xx.h"
#include "event.h"
-struct wl1271_tx_hw_descr;
-
/* The maximum number of Tx descriptors in all chip families */
#define WLCORE_MAX_TX_DESCRIPTORS 32
+/* forward declaration */
+struct wl1271_tx_hw_descr;
+enum wl_rx_buf_align;
struct wlcore_ops {
int (*identify_chip)(struct wl1271 *wl);
int (*boot)(struct wl1271 *wl);
void (*set_tx_desc_data_len)(struct wl1271 *wl,
struct wl1271_tx_hw_descr *desc,
struct sk_buff *skb);
+ enum wl_rx_buf_align (*get_rx_buf_align)(struct wl1271 *wl,
+ u32 rx_desc);
s8 (*get_pg_ver)(struct wl1271 *wl);
void (*get_mac)(struct wl1271 *wl);
};