PCI: xilinx-nwl: Update PCI config space remap function
authorLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Wed, 19 Apr 2017 16:48:58 +0000 (17:48 +0100)
committerBjorn Helgaas <bhelgaas@google.com>
Mon, 24 Apr 2017 18:53:15 +0000 (13:53 -0500)
PCI configuration space should be mapped with a memory region type that
generates on the CPU host bus non-posted write transations. Update the
driver to use the devm_pci_remap_cfg* interface to make sure the correct
memory mappings for PCI configuration space are used.

Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>
Cc: Michal Simek <michal.simek@xilinx.com>
drivers/pci/host/pcie-xilinx-nwl.c

index 4c3e0ab354963322679a2a88af7ba9670a24b5ab..4b16b26ae9090cdf2042e4b8a7a32bdfbc8f4f4b 100644 (file)
@@ -761,7 +761,7 @@ static int nwl_pcie_parse_dt(struct nwl_pcie *pcie,
        pcie->phys_pcie_reg_base = res->start;
 
        res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "cfg");
-       pcie->ecam_base = devm_ioremap_resource(dev, res);
+       pcie->ecam_base = devm_pci_remap_cfg_resource(dev, res);
        if (IS_ERR(pcie->ecam_base))
                return PTR_ERR(pcie->ecam_base);
        pcie->phys_ecam_base = res->start;