drm/exynos: implement atomic_{begin/flush} of DECON
authorHyungwon Hwang <human.hwang@samsung.com>
Thu, 27 Aug 2015 09:21:14 +0000 (18:21 +0900)
committerInki Dae <daeinki@gmail.com>
Sun, 30 Aug 2015 16:02:58 +0000 (01:02 +0900)
Each CRTC's atomic_{begin/flush} must stop/start the update of shadow
registers to active register in the functions. This patch achieves these
purpose by moving the setting of protection bits to those functions from
decon_update_plane.

v2: rebased to the branch exynos-drm-next

Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
drivers/gpu/drm/exynos/exynos5433_drm_decon.c
drivers/gpu/drm/exynos/exynos7_drm_decon.c

index 8d65e45156bd09d68f2765ad0b3ff14159e9920e..f24dc2d2e870a192b7e3ecdd05b726f2e4001bbb 100644 (file)
@@ -219,6 +219,17 @@ static void decon_shadow_protect_win(struct decon_context *ctx, int win,
        writel(val, ctx->addr + DECON_SHADOWCON);
 }
 
+static void decon_atomic_begin(struct exynos_drm_crtc *crtc,
+                                       struct exynos_drm_plane *plane)
+{
+       struct decon_context *ctx = crtc->ctx;
+
+       if (ctx->suspended)
+               return;
+
+       decon_shadow_protect_win(ctx, plane->zpos, true);
+}
+
 static void decon_update_plane(struct exynos_drm_crtc *crtc,
                               struct exynos_drm_plane *plane)
 {
@@ -232,8 +243,6 @@ static void decon_update_plane(struct exynos_drm_crtc *crtc,
        if (ctx->suspended)
                return;
 
-       decon_shadow_protect_win(ctx, win, true);
-
        val = COORDINATE_X(plane->crtc_x) | COORDINATE_Y(plane->crtc_y);
        writel(val, ctx->addr + DECON_VIDOSDxA(win));
 
@@ -265,15 +274,10 @@ static void decon_update_plane(struct exynos_drm_crtc *crtc,
        val |= WINCONx_ENWIN_F;
        writel(val, ctx->addr + DECON_WINCONx(win));
 
-       decon_shadow_protect_win(ctx, win, false);
-
        /* standalone update */
        val = readl(ctx->addr + DECON_UPDATE);
        val |= STANDALONE_UPDATE_F;
        writel(val, ctx->addr + DECON_UPDATE);
-
-       if (ctx->i80_if)
-               atomic_set(&ctx->win_updated, 1);
 }
 
 static void decon_disable_plane(struct exynos_drm_crtc *crtc,
@@ -301,6 +305,20 @@ static void decon_disable_plane(struct exynos_drm_crtc *crtc,
        writel(val, ctx->addr + DECON_UPDATE);
 }
 
+static void decon_atomic_flush(struct exynos_drm_crtc *crtc,
+                               struct exynos_drm_plane *plane)
+{
+       struct decon_context *ctx = crtc->ctx;
+
+       if (ctx->suspended)
+               return;
+
+       decon_shadow_protect_win(ctx, plane->zpos, false);
+
+       if (ctx->i80_if)
+               atomic_set(&ctx->win_updated, 1);
+}
+
 static void decon_swreset(struct decon_context *ctx)
 {
        unsigned int tries;
@@ -455,8 +473,10 @@ static struct exynos_drm_crtc_ops decon_crtc_ops = {
        .enable_vblank          = decon_enable_vblank,
        .disable_vblank         = decon_disable_vblank,
        .commit                 = decon_commit,
+       .atomic_begin           = decon_atomic_begin,
        .update_plane           = decon_update_plane,
        .disable_plane          = decon_disable_plane,
+       .atomic_flush           = decon_atomic_flush,
        .te_handler             = decon_te_irq_handler,
 };
 
index 7651499aa5acf66023b2528c69db00135b6ee9c9..c74e30e34c13489441bd452ae6e927d9475d193c 100644 (file)
@@ -383,6 +383,17 @@ static void decon_shadow_protect_win(struct decon_context *ctx,
        writel(val, ctx->regs + SHADOWCON);
 }
 
+static void decon_atomic_begin(struct exynos_drm_crtc *crtc,
+                                       struct exynos_drm_plane *plane)
+{
+       struct decon_context *ctx = crtc->ctx;
+
+       if (ctx->suspended)
+               return;
+
+       decon_shadow_protect_win(ctx, plane->zpos, true);
+}
+
 static void decon_update_plane(struct exynos_drm_crtc *crtc,
                               struct exynos_drm_plane *plane)
 {
@@ -410,9 +421,6 @@ static void decon_update_plane(struct exynos_drm_crtc *crtc,
         * is set.
         */
 
-       /* protect windows */
-       decon_shadow_protect_win(ctx, win, true);
-
        /* buffer start address */
        val = (unsigned long)plane->dma_addr[0];
        writel(val, ctx->regs + VIDW_BUF_START(win));
@@ -510,14 +518,22 @@ static void decon_disable_plane(struct exynos_drm_crtc *crtc,
        val &= ~WINCONx_ENWIN;
        writel(val, ctx->regs + WINCON(win));
 
-       /* unprotect windows */
-       decon_shadow_protect_win(ctx, win, false);
-
        val = readl(ctx->regs + DECON_UPDATE);
        val |= DECON_UPDATE_STANDALONE_F;
        writel(val, ctx->regs + DECON_UPDATE);
 }
 
+static void decon_atomic_flush(struct exynos_drm_crtc *crtc,
+                                       struct exynos_drm_plane *plane)
+{
+       struct decon_context *ctx = crtc->ctx;
+
+       if (ctx->suspended)
+               return;
+
+       decon_shadow_protect_win(ctx, plane->zpos, false);
+}
+
 static void decon_init(struct decon_context *ctx)
 {
        u32 val;
@@ -614,8 +630,10 @@ static const struct exynos_drm_crtc_ops decon_crtc_ops = {
        .enable_vblank = decon_enable_vblank,
        .disable_vblank = decon_disable_vblank,
        .wait_for_vblank = decon_wait_for_vblank,
+       .atomic_begin = decon_atomic_begin,
        .update_plane = decon_update_plane,
        .disable_plane = decon_disable_plane,
+       .atomic_flush = decon_atomic_flush,
 };