drm/i915: Use masked write for Context Status Buffer Pointer
authorMika Kuoppala <mika.kuoppala@linux.intel.com>
Thu, 6 Aug 2015 14:00:59 +0000 (17:00 +0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Fri, 14 Aug 2015 15:50:38 +0000 (17:50 +0200)
This register needs to be updated with masked writes.

This was found by code inspection and comparison with Bspec and
doesn't seem to fix any known issue.

Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: Michel Thierry <michel.thierry@intel.com>
[danvet: Add note about impact.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_lrc.c

index 99bba8ece464bd5f9844e28e70fb96851797dd75..29347e7a9565af669da8cacee76da2829e9f5547 100644 (file)
@@ -521,7 +521,7 @@ void intel_lrc_irq_handler(struct intel_engine_cs *ring)
        ring->next_context_status_buffer = write_pointer % 6;
 
        I915_WRITE(RING_CONTEXT_STATUS_PTR(ring),
-                  ((u32)ring->next_context_status_buffer & 0x07) << 8);
+                  _MASKED_FIELD(0x07 << 8, ((u32)ring->next_context_status_buffer & 0x07) << 8));
 }
 
 static int execlists_context_queue(struct drm_i915_gem_request *request)