struct ieee80211_rate *tx_rate = ieee80211_get_tx_rate(hw, tx_info);
struct rtl8xxxu_priv *priv = hw->priv;
struct rtl8723au_tx_desc *tx_desc;
+ struct rtl8723bu_tx_desc *tx_desc40;
struct rtl8xxxu_tx_urb *tx_urb;
struct ieee80211_sta *sta = NULL;
struct ieee80211_vif *vif = tx_info->control.vif;
u16 rate_flag = tx_info->control.rates[0].flags;
int tx_desc_size = priv->fops->tx_desc_size;
int ret;
- bool txdesc40, ampdu_enable;
+ bool usedesc40, ampdu_enable;
if (skb_headroom(skb) < tx_desc_size) {
dev_warn(dev,
if (ieee80211_is_action(hdr->frame_control))
rtl8xxxu_dump_action(dev, hdr);
- txdesc40 = (tx_desc_size == 40);
+ usedesc40 = (tx_desc_size == 40);
tx_info->rate_driver_data[0] = hw;
if (control && control->sta)
}
}
- seq_number = IEEE80211_SEQ_TO_SN(le16_to_cpu(hdr->seq_ctrl));
- tx_desc->txdw3 = cpu_to_le32((u32)seq_number << TXDESC_SEQ_SHIFT);
-
if (rate_flag & IEEE80211_TX_RC_MCS)
rate = tx_info->control.rates[0].idx + DESC_RATE_MCS0;
else
}
}
- if (!txdesc40) {
+ seq_number = IEEE80211_SEQ_TO_SN(le16_to_cpu(hdr->seq_ctrl));
+ if (!usedesc40) {
+ tx_desc->txdw3 =
+ cpu_to_le32((u32)seq_number << TXDESC_SEQ_SHIFT_8723A);
+
if (ampdu_enable)
tx_desc->txdw1 |= cpu_to_le32(TXDESC_AGG_ENABLE_8723A);
else
tx_desc->txdw1 |= cpu_to_le32(TXDESC_AGG_BREAK_8723A);
} else {
+ tx_desc40 = (struct rtl8723bu_tx_desc *)tx_desc;
+
+ tx_desc40->txdw9 =
+ cpu_to_le32((u32)seq_number << TXDESC_SEQ_SHIFT_8723B);
+
if (ampdu_enable)
- tx_desc->txdw2 |= cpu_to_le32(TXDESC_AGG_ENABLE_8723B);
+ tx_desc40->txdw2 |=
+ cpu_to_le32(TXDESC_AGG_ENABLE_8723B);
else
- tx_desc->txdw2 |= cpu_to_le32(TXDESC_AGG_BREAK_8723B);
+ tx_desc40->txdw2 |= cpu_to_le32(TXDESC_AGG_BREAK_8723B);
};
if (ieee80211_is_data_qos(hdr->frame_control))
#define TXDESC_GID_8723B BIT(24)
/* Word 3 */
-#define TXDESC_SEQ_SHIFT 16
-#define TXDESC_SEQ_MASK 0x0fff0000
+#define TXDESC_SEQ_SHIFT_8723A 16
+#define TXDESC_SEQ_MASK_8723A 0x0fff0000
/* Word 4 */
#define TXDESC_QOS BIT(6)
/* Word 6 */
#define TXDESC_MAX_AGG_SHIFT 11
+/* Word 9 */
+#define TXDESC_SEQ_SHIFT_8723B 12
+#define TXDESC_SEQ_MASK_8723B 0x00fff000
+
struct phy_rx_agc_info {
#ifdef __LITTLE_ENDIAN
u8 gain:7, trsw:1;